Patent application number | Description | Published |
20130163349 | PROGRAMMING PULSE GENERATION CIRCUIT AND NON-VOLATILE MEMORY APPARATUS HAVING THE SAME - A program pulse generation circuit includes: a set pulse generator configured to apply a set pulse to an output node in response to a driving signal, a set pulse control signal, and a first switching signal, and a current controller configured to control step reductions forming the set pulse in response to the driving signal and a second switching signal. | 06-27-2013 |
20140063896 | NONVOLATILE MEMORY APPARATUS AND METHOD FOR DRIVING THE SAME - A method for driving a nonvolatile memory apparatus includes: a data storage preparation step of setting a write control voltage to a first level of voltage; a data storage step of driving a driving transistor through the write control voltage to generate a write current, and storing an external data in a memory cell through the write current; a data detection step of varying the write control voltage by a predetermined level from a preset voltage level, and reading the data stored in the memory cell; and a data verification step of determining whether the stored data coincides with the external data or not, and repeating the data storage step and the data detection step according to a result of the determining. | 03-06-2014 |
20150357048 | SEMICONDUCTOR MEMORY APPARATUS AND TEST METHOD THEREOF - A semiconductor memory apparatus may include a read/write circuit unit configured to receive an external voltage, to read data from a memory cell array, and to generate a pre-read signal, while an internal voltage is generated during a test mode, and a controller configured to selectively drive a write circuit unit in response to the pre-read signal. | 12-10-2015 |
20160042788 | WRITE DRIVER, RESISTANCE VARIABLE MEMORY APPARATUS INCLUDING THE SAME, AND OPERATION METHOD - A write driver is configured to determine a magnitude and an application time of a pre-emphasis current pulse in response to control codes generated according to parasitic components on a path from a write driver to a program target cell and a resistance value of the program target cell, and supply a preset program current to a memory circuit block by adding a pre-emphasis current to the preset program current in a program mode. | 02-11-2016 |
Patent application number | Description | Published |
20130322155 | VARIABLE RESISTANCE MEMORY DEVICE AND DATA STORAGE DEVICE INCLUDING THE SAME - A variable resistance memory device includes memory cells arranged at a region where word lines and bit lines cross each other, control logic configured to generate a command flag indicative of a program operation mode in response to a program command provided from an external device and configured to control the program operation of the memory cells based on the command flag and a write driver configured to be activated in response to the flag command and configured to supply a program current to the memory cells. | 12-05-2013 |
20140063905 | SEMICONDUCTOR MEMORY DEVICE CAPABLE OF MEASURING WRITE CURRENT AND METHOD FOR MEASURING WRITE CURRENT - A method for measuring a write current of a semiconductor memory device includes the steps of: programming initial data into memory cells which are to be programmed substantially at the same time; determining whether the memory cells are programmed into the same state or not; inputting test data when the memory cells are programmed into the same state; setting write current paths of the memory cells by comparing the initial data and the test data; and measuring a write current consumed when the test data are programmed into the memory cells. | 03-06-2014 |
20140177368 | NONVOLATILE MEMORY APPARATUS - A nonvolatile memory apparatus includes a memory cell configured to receive a first current and a second current through a bit line which is connected to a sensing node; a sensing node level control unit configured to be driven in response to a control signal, compare a reference voltage and a voltage of the sensing node, and output a driving signal to a driving node; a first current driving unit configured to output the first current to the driving node by using a first driving voltage in response to the driving signal; and a current control unit configured to perform a discharge operation of the bit line or electrically connect the driving node and the sensing node, in response to the control signal. | 06-26-2014 |
20150364174 | WORD LINE DRIVER CIRCUIT AND RESISTANCE VARIABLE MEMORY APPARATUS HAVING THE SAME - A world line driver circuit according to an embodiment includes a driving unit configured to output a sub word line driving signal in response to a word line select signal and a main word line driving signal, a transmission unit configured to transmit the sub word line driving signal to a word line in response to a first enable signal, and a precharge unit configured to precharge a potential of the word line. | 12-17-2015 |
20160064051 | SEMICONDUCTOR MEMORY APPARATUS - A semiconductor memory apparatus may include a write driver, a data sensing section, and a programming control section. The write driver may write an input data into a memory cell in response to a write signal. The data sensing section may generate a comparison flag signal by comparing an output data outputted from the memory cell with a reference voltage in response to a verification read signal. The programming control section may generate the write signal for an initial write operation and the verification read signal in response to a write command, and generate the write signal for a following write operation as soon as the comparison flag signal is at a predetermined level. | 03-03-2016 |
20160105192 | DIGITAL TO ANALOG CONVERTER - A digital to analog converter includes a reference voltage generation unit that generates a reference voltage, and a plurality of unit conversion units. A number of unit conversion units to be activated are decided in response to digital codes. An activated unit conversion unit drives a control node to a voltage level corresponding to a voltage level of the reference voltage, and a deactivated unit conversion unit substantially maintains the control node to a voltage level greater than a voltage level of a ground voltage. | 04-14-2016 |
Patent application number | Description | Published |
20150076599 | SUPER JUNCTION SEMICONDUCTOR DEVICE - There is provided a super junction semiconductor device. The super junction semiconductor device includes a cell area and a junction termination area disposed on a substrate, and a transition area disposed between the cell area and the junction termination area, and the cell area, the junction termination area, and the transition area each include one or more unit cells comprising a N-type pillar region and a P-type pillar region among a plurality of N-type pillar regions and a P-type pillar regions that are alternated between the cell area and the junction termination area. | 03-19-2015 |
20150076600 | SUPER JUNCTION SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - There is provided a super junction semiconductor device and a method of manufacturing the same. A super junction semiconductor device includes an n-type semiconductor region disposed in a substrate, two or more p-type semiconductor regions disposed adjacent to the n-type semiconductor region alternately in a direction parallel to a surface of the substrate, a p-type body region disposed on at least one of the p-type semiconductor regions, and a source region disposed in the p-type body region, and an n-type ion implantation region is formed along a lower end of the n-type semiconductor region and lower ends of the p-type semiconductor regions. | 03-19-2015 |
20160035825 | SUPER JUNCTION SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - There is provided a super junction semiconductor device and a method of manufacturing the same. A super junction semiconductor device includes an n-type semiconductor region disposed in a substrate, two or more p-type semiconductor regions disposed adjacent to the n-type semiconductor region alternately in a direction parallel to a surface of the substrate, a p-type body region disposed on at least one of the p-type semiconductor regions, and a source region disposed in the p-type body region, and an n-type ion implantation region is formed along a lower end of the n-type semiconductor region and lower ends of the p-type semiconductor regions. | 02-04-2016 |
Patent application number | Description | Published |
20130321991 | OPTICALLY CLEAR ADHESIVE FILM AND ELECTRONIC DEVICE USING THE SAME - An optically clear adhesive film which can be used when an electronic device is remanufactured or parts are reused, and an electronic device using the same are provided. The optically clear adhesive film includes: a UV blocking adhesive layer, and a UV curable adhesive layer which is located on one surface of the UV blocking adhesive layer and is cured when being irradiated with UV light. | 12-05-2013 |
20140356598 | RE-ADHESIVE MULTI-LAYERED DOUBLE-SIDED TAPE AND MANUFACTURING METHOD THEREOF - A re-adhesive multi-layered double-sided tape which has its interlayer adhesion reinforced and improves reliability, and a manufacturing method thereof are provided. The re-adhesive multi-layered double-sided tape includes: a base layer; primer layers which are formed on opposite surfaces of the base layer; and re-adhesive adhesion layers which are formed on the primer layers. | 12-04-2014 |
20150242352 | SEMICONDUCTOR MEMORY DEVICE, MEMORY SYSTEM, AND METHOD USING BUS-INVERT ENCODING - A semiconductor memory device comprises a memory cell array and a data inversion circuit. The data inversion circuit is configured to receive a first unit data and a second unit data stored in the memory cell array through different first data lines, determine, while the first unit data is transmitted to a data input/output (I/O) buffer through a second data line, whether to the invert the second unit data based on a Hamming distance between the first unit data and the second unit data, and transmit the inverted or non-inverted second unit data to the data I/O buffer through the second data line. | 08-27-2015 |
20160064057 | ADDRESS ALIGNER AND MEMORY DEVICE INCLUDING THE SAME - An address aligner includes a command address providing unit, an alignment signal providing unit and an alignment unit. The command address providing unit outputs a sync command address signal by delaying a command address signal in synchronization with a first clock signal. The sync command address signal is synchronized with the first clock signal. The alignment signal providing unit outputs alignment clock signals by delaying a chip select signal in synchronization with a second clock signal. The alignment clock signals are synchronized with the second clock signal. The alignment unit outputs a plurality of addresses in synchronization with the alignment clock signals. The plurality of addresses is included in the sync command address signal. If the address aligner according to example embodiments is used, the operation speed of the memory device may be increased by aligning a plurality of addresses in synchronization with the alignment clock signal that is generated based on a chip select signal. | 03-03-2016 |
Patent application number | Description | Published |
20120214495 | APPARATUS AND METHOD FOR CONTROLLING HANDOVER TO PREVENT FEMTOCELL INTERFERENCE - Provided are apparatus and method for controlling handover to prevent femtocell interference. The apparatus may include an event receiving module, a handover determining module, and an inter-frequency processing module. The event receiving module may be configured to receive a control message from user equipment. The handover determining module may be configured to analyze the received control message and determine whether the control message includes a request of inter-cell handover from a first cell base station of the first cell to a second cell base station of one of the second cells. The inter-frequency processing module may be configured to perform inter-frequency handover using an unshared frequency when the handover determining module determines that the control message includes the request of inter-cell handover. | 08-23-2012 |
20120263108 | ADAPTIVELY CONTROLLING PREFIX LENGTH - Provided are apparatus and method for setting a cyclic prefix length according to a type of a base station. The apparatus may include a memory, a receiver, a selector, and an inserter. The receiver may be configured to store and to manage a plurality of prefix lengths associated with base station types. The receiver may be configured to receive base station information from a base station. The selector may be configured to select a prefix length from the plurality of prefix length based on the received base station information. The inserter may be configured to insert a cyclic prefix having the determined prefix length in a guard interval of a transmission frame. | 10-18-2012 |
20130034081 | HANDOVER IN LONG TERM EVOLUTION NETWORK - Described embodiments provide for handover in a long term evolution (LTE) communication network. A LTE macrocell base station may receive a measurement report from user equipment while providing a communication service to the user equipment located within a service area of the LTE macrocell base station, and determine whether or not the neighbor cell is a LTE macrocell or a LTE femtocell based on the measurement report. The LTE macrocell base station may initiate hand-over of the user equipment to a neighbor WCDMA macrocell base station when the neighbor cell is determined as the LTE femtocell. | 02-07-2013 |
20130337797 | TRACKING AREA MANAGEMENT - The disclosure is related tracking area management in a femtocell network. A mobility management entity may receive, from a femtocell base station, macrocell tracking area information associated with the femtocell base station. The mobility management entity may combine the received macrocell tracking area information with femtocell tracking area information associated with the femtocell base station and storing the combined tracking area information as integrated tracking area information. | 12-19-2013 |
20140323134 | APPARATUS AND METHOD FOR CONTROLLING HANDOVER TO PREVENT FEMTOCELL INTERFERENCE - Provided are apparatus and method for controlling handover to prevent femtocell interference. The apparatus may include an event receiving module, a handover determining module, and an inter-frequency processing module. The event receiving module may be configured to receive a control message from user equipment. The handover determining module may be configured to analyze the received control message and determine whether the control message includes a request of inter-cell handover from a first cell base station of the first cell to a second cell base station of one of the second cells. The inter-frequency processing module may be configured to perform inter-frequency handover using an unshared frequency when the handover determining module determines that the control message includes the request of inter-cell handover. | 10-30-2014 |
Patent application number | Description | Published |
20090212295 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device and method of fabricating the same, which forms a contact hole, a via hole or a via contact hole with multiple profiles with various taper angles. The semiconductor device includes a substrate, a thin film transistor formed on the substrate and having a semiconductor layer, a gate insulating layer, a gate electrode, and an interlayer dielectric, and a contact hole penetrating the gate insulating layer and the interlayer dielectric and exposing a portion of the semiconductor layer. The contact hole has a multiple profile in which an upper portion of the contact hole has a wet etch profile and a lower portion of the contact hole has at least one of the wet etch profile and a dry etch profile. | 08-27-2009 |
20090275176 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device and method of fabricating the same, which forms a contact hole, a via hole or a via contact hole with multiple profiles with various taper angles. The semiconductor device includes a substrate, a thin film transistor formed on the substrate and having a semiconductor layer, a gate insulating layer, a gate electrode, and an interlayer dielectric, and a contact hole penetrating the gate insulating layer and the interlayer dielectric and exposing a portion of the semiconductor layer. The contact hole has a multiple profile in which an upper portion of the contact hole has a wet etch profile and a lower portion of the contact hole has at least one of the wet etch profile and a dry etch profile. | 11-05-2009 |
20120146143 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device and method of fabricating the same, which forms a contact hole, a via hole or a via contact hole with multiple profiles with various taper angles. The semiconductor device includes a substrate, a thin film transistor formed on the substrate and having a semiconductor layer, a gate insulating layer, a gate electrode, and an interlayer dielectric, and a contact hole penetrating the gate insulating layer and the interlayer dielectric and exposing a portion of the semiconductor layer. The contact hole has a multiple profile in which an upper portion of the contact hole has a wet etch profile and a lower portion of the contact hole has at least one of the wet etch profile and a dry etch profile. | 06-14-2012 |
Patent application number | Description | Published |
20090217339 | FAST ADAPTIVE CHANNEL CONVERTING METHOD AND APPARATUS, AND COMPUTER READABLE RECORDING MEDIUM FOR EXECUTING THE FAST ADAPTIVE CHANNEL CONVERTING METHOD - A fast adaptive channel converting method and apparatus, and a computer readable recording medium having recorded thereon a program to execute the fast adaptive channel converting method. The fast adaptive channel converting method includes generating adjacent channel data by pre-signal processing an adjacent channel signal of a reference channel, receiving a channel change request from a user, searching for channel data corresponding to a changed channel in the adjacent channel data, and reproducing the searched channel data. Unlike a conventional technology, the fast adaptive channel changing apparatus and method prevents a screen blank time that may occur while changing a channel in a digital broadcast receiving apparatus, and thus boredom or inconvenience of a user can be removed. Also, when a channel is changed by using a preferred channel list, a channel search time can be remarkably reduced, and the user can easily watch a program of a preferred channel. | 08-27-2009 |
20110193933 | Apparatus, System and Method for Video Call - An apparatus, system and method for implementing a video call between a first caller and a second caller are provided. The apparatus includes: an image sensor which captures an image of the first caller; a display which displays an image of the second caller; a microphone which captures an audio input by the first caller; a speaker which outputs an audio input by the second caller; a detector which is configured to determine a location of the first caller; and a controller which controls the detector to determine the location of the first caller as corresponding to an original location, wherein in response to the first caller changing a location from the original location to a new location, the controller controls the detector to determine the location of the first caller as being the new location, and controls the microphone to adjust a configuration of the microphone based on the new location of the first caller. | 08-11-2011 |
20130169738 | DIGITAL IMAGING APPARATUS AND CONTROL METHOD THEREOF - A digital imaging apparatus and a control method thereof are provided. The digital imaging apparatus includes a body including a display unit configured to output an image signal as an image, and an image encoder; a user input unit comprising an image input unit configured to generate and output an outside image signal that corresponds to an outside image and is not encoded or compressed; and a data interface configured to transmit the outside image signal output by the image input unit to the body, wherein the image encoder is configured to encode the outside image signal, which is received by the body from the data interface, in a predetermined format. | 07-04-2013 |
20140009628 | DISPLAY APPARATUS AND CONTROL METHOD THEREOF - A display apparatus and a control method thereof include an image communication camera including an image sensor is installed to be movable up and down at an upper portion of the display apparatus, and protrudes from the display apparatus when in use; an image processor processing an image signal sensed by the image sensor; a display displaying the processed image signal; a sensor sensing the position of the image communication camera; a power supply supplying components of the display apparatus; and a controller controlling the power supply to supply electric power to the image communication camera if the image communication camera is moved up, and cut off the electric power to the image communication camera if the image communication camera is moved down. Thus, it is possible to determine whether the image communication camera and the microphone operate or not based on the position of the image communication camera. | 01-09-2014 |
20140118624 | ELECTRONIC DEVICE AND CONTROL METHOD THEREOF - An electronic device and a control method thereof are disclosed, the electronic device including: an operation implementation unit conducting a predetermined operation; a first main controller controlling the operation of the operation implementation unit; an input reception unit receiving an input signal; a second main controller processing the input signal and being in the power saving state in the standby mode; and a subcontroller controlling the second main controller to process the input signal when the input signal is received in the standby mode, wherein the second main controller processes the received input signal according to control of the subcontroller, controls the first main controller to operate in the normal mode when the input signal corresponds to entering the normal mode, and returns to the power saving state in the standby mode when the input signal does not correspond to entering the normal mode. | 05-01-2014 |
20140146124 | DISPLAY APPARATUS, METHOD FOR CONTROLLING THE DISPLAY APPARATUS, GLASSES AND METHOD FOR CONTROLLING THE GLASSES - A display apparatus for providing a multi view mode along with glasses is provided. The display apparatus includes a communicator which communicates with the glasses, a display which displays multiple contents respectively, a screen telephony performer which performs screen telephony with another display apparatus, and a controller. The controller controls the communicator to transmit a user's voice received from the another display apparatus to the glasses, when the screen telephony with another display apparatus is performed, and which controls the display to display screen telephony images received from the another display apparatus and one content from among the multiple contents in a multi view mode. | 05-29-2014 |
20140375893 | ELECTRONIC DEVICE AND CONTROL METHOD THEREOF - An electronic device and a control method thereof are disclosed, the electronic device including: an operation implementation unit conducting a predetermined operation; a first main controller controlling the operation of the operation implementation unit; an input reception unit receiving an input signal; a second main controller processing the input signal and being in the power saving state in the standby mode; and a subcontroller controlling the second main controller to process the input signal when the input signal is received in the standby mode, wherein the second main controller processes the received input signal according to control of the subcontroller, controls the first main controller to operate in the normal mode when the input signal corresponds to entering the normal mode, and returns to the power saving state in the standby mode when the input signal does not correspond to entering the normal mode. | 12-25-2014 |
20160080314 | ACCESS POINT AND CONTROL METHOD THEREOF - Provided herein is an access point including a communicator configured to communicate with an external electronic apparatus; and a controller configured to, in response to determining that a preset first electronic apparatus is connected to the communicator, provide a signal for requesting connection between a second electronic apparatus connected to another access point and the first electronic apparatus to the another access point based on a type of an IP address (Internet Protocol) allocated to the access point, and form a single network with the another access point based on a signal in response to the connection request signal, thereby providing a user with convenience in communication connection with the electronic apparatus. | 03-17-2016 |
Patent application number | Description | Published |
20130182465 | WIND POWER CONVERTER STRUCTURE AND WIND POWER GENERATION SYSTEM INCLUDING THE SAME - A wind power converter structure and a wind power generation system including the converter structure are provided. The converter structure comprises a plurality of generator-side converters arranged in a nacelle located on a top part of the tower; a plurality of grid-side converters arranged on a bottom part of the tower or outside the tower, wherein a DC input side of the grid-side converter is coupled to a DC output side of the generator-side converter; at least one DC bus connected between the generator-side converter and the grid-side converter; and an isolation transformer of which a primary side is coupled to the AC output side of the grid-side converter, wherein a secondary side of the isolation transformer is coupled to a power grid. | 07-18-2013 |
20130272038 | EXCITATION CONTROL CIRCUIT, CONTROL METHOD AND ELECTRICALLY EXCITED WIND POWER SYSTEM HAVING THE SAME - The present invention provides an excitation control circuit, a control method using the same and an electrically excited wind power system having the same. The excitation control circuit comprises at least one converter and at least one AC/DC conversion module. The converter is located between an AC electric grid and a wind power generator, so as to convert AC power generated by the wind power generator into AC power corresponding to the AC electric grid. The input side of the AC/DC conversion module is electrically connected between the converter and the wind power generator, and the output side is coupled to an excitation device. The AC/DC conversion module is used to convert the AC power from the wind power generator into a DC voltage, and provides an excitation current for the wind power generator using the DC voltage. | 10-17-2013 |
20130279222 | CONVERTER SYSTEM AND CONTROL METHOD THEREOF - A control method of a converter system includes: sampling a current of each three-phase winding to obtain a real-time current of each converter; obtaining a mean current by averaging the real-time current of each secondary converter and the real-time current of the primary converter, and transferring the mean current to each secondary converter; obtaining the differential-mode current corresponding to each secondary converter according to the mean current and the real-time current of each secondary converter; performing a circulation current control on the mean current and the differential-mode current of each secondary converter based on a d-q coordinate system to generate a mean-current conditioning signal and a differential-mode current conditioning signal, thereby controlling each secondary converter; and obtaining a sum of the differential-mode current conditioning signal of the secondary converters and negating the sum to obtain a differential-mode current conditioning signal of the primary converter, thereby controlling the primary converter. | 10-24-2013 |