Inventors list

Assignees list

Classification tree browser

Top 100 Inventors

Top 100 Assignees


Chang-Su Seo

Chang-Su Seo, Yongin-Si KR

Patent application numberDescriptionPublished
20110086451FLAT PANEL DISPLAY AND METHOD OF FABRICATING THE SAME - A flat panel display, and method of fabricating the same, including a substrate having a display portion and a pad that is arranged on the substrate and is electrically coupled with the display portion. The pad includes a pad electrode arranged on the substrate, a passivation layer arranged on the pad electrode and having only one contact hole that exposes the pad electrode, and a transparent electrode arranged on the passivation layer and the pad electrode. The passivation layer may alternatively have a plurality of contact holes that expose the pad electrode. In this case, the reflective layer pattern is arranged on the passivation layer and the pad electrode, and it exposes portions of the pad electrode in the contact holes. Furthermore, the transparent electrode would be arranged on the reflective layer pattern and the exposed portions of the pad electrode.04-14-2011

Chang-Su Seo, Yongin-City KR

Patent application numberDescriptionPublished
20100102713ORGANIC LIGHT EMITTING DISPLAY DEVICE - Embodiments of the present invention provide an organic light emitting display device including: a plurality of light emitting elements on a first substrate, each of the plurality of light emitting elements including a first electrode and an organic light emitting layer, and a second electrode on the plurality of light emitting elements; a second substrate facing the first substrate with the plurality of light emitting elements therebetween; spacers on the second substrate corresponding to portions of the second electrode, the portions located on spaces between the plurality of light emitting elements; and an auxiliary electrode on the spacers and contacting the second electrode.04-29-2010
20110003408FLAT PANEL DISPLAY AND METHOD FOR FABRICATING THE SAME - A flat panel display, having an anti-electrostatic configuration, comprising a plurality of gate lines and data lines formed on an insulating substrate having an emission region and a pad portion, an anti-electrostatic wire initially coupling the gate lines, and an anti-electrostatic circuit coupled to a data line. The anti-electrostatic wire between a gate line and an adjacent gate line is subsequently cut by an opening for cutting the anti-electrostatic wire to electrically isolate the respective gate lines.01-06-2011

Chang-Su Seo, Suwon-Si KR

Patent application numberDescriptionPublished
20080311692Top Emission Organic Light Emitting Diode Display Using Auxiliary Electrode to Prevent Voltage Drop of Upper Electrode and Method of Fabricating the Same - An organic light emitting diode (OLED) display. The OLED display includes: a lower electrode formed on a layer on an insulating substrate having a thin film transistor. The lower electrode is electrically connected to the thin film transistor. An auxiliary electrode is formed on the same layer as the lower electrode, and a pixel defining layer is formed on edges of the lower electrode, thereby defining an opening which exposes a portion of the lower electrode. An organic layer is formed on the portion of the lower electrode exposed by the opening, and an upper electrode is formed on an entire surface of the insulating substrate and electrically connected to the auxiliary electrode. An edge of the auxiliary electrode may have a taper angle of at least 90°.12-18-2008
20090212295SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device and method of fabricating the same, which forms a contact hole, a via hole or a via contact hole with multiple profiles with various taper angles. The semiconductor device includes a substrate, a thin film transistor formed on the substrate and having a semiconductor layer, a gate insulating layer, a gate electrode, and an interlayer dielectric, and a contact hole penetrating the gate insulating layer and the interlayer dielectric and exposing a portion of the semiconductor layer. The contact hole has a multiple profile in which an upper portion of the contact hole has a wet etch profile and a lower portion of the contact hole has at least one of the wet etch profile and a dry etch profile.08-27-2009
20090275176SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device and method of fabricating the same, which forms a contact hole, a via hole or a via contact hole with multiple profiles with various taper angles. The semiconductor device includes a substrate, a thin film transistor formed on the substrate and having a semiconductor layer, a gate insulating layer, a gate electrode, and an interlayer dielectric, and a contact hole penetrating the gate insulating layer and the interlayer dielectric and exposing a portion of the semiconductor layer. The contact hole has a multiple profile in which an upper portion of the contact hole has a wet etch profile and a lower portion of the contact hole has at least one of the wet etch profile and a dry etch profile.11-05-2009
20090280590ORGANIC LIGHT EMITTING DEVICE AND METHOD OF FABRICATING THE SAME - An organic light emitting device (OLED) and a method of fabricating the same are provided, wherein the OLED includes a thin film transistor having a gate electrode, and source and drain electrodes on a substrate; a triple-layered pixel electrode connected to one of the source and drain electrodes through a via-contact hole formed in an insulating layer on the substrate, and having a lower pixel electrode, a reflective layer pattern and an upper pixel electrode; an organic layer disposed on the upper pixel electrode and having at least an emission layer; and an opposite electrode disposed on the organic layer.11-12-2009
20090309493Organic light emitting display and its method of fabrication - An organic light emitting display is divided into a light emitting region and a non-light emitting region, the non-light emitting region of the organic light emitting display including: a first substrate; a first passivation layer and a second passivation layer sequentially arranged on the first substrate and having a step in an undercut shape; and an auxiliary electrode layer, an El common layer, and a second layer sequentially arranged throughout the non-light emitting region including the first and second passivation layers, the auxiliary electrode layer being shorted to the second layer in the step at the slope of the second passivation layer or shorted to the first passivation layer in the undercut shape arranged under the second passivation layer.12-17-2009

Patent applications by Chang-Su Seo, Suwon-Si KR