| Patent application number | Description | Published |
|---|
| 20080203390 | METHOD FOR MANUFACTURING A SIGNAL LINE, THIN FILM TRANSISTOR PANEL, AND METHOD FOR MANUFACTURING THE THIN FILM TRANSISTOR PANEL - A method for manufacturing a thin film transistor array panel includes forming a gate line on a substrate; sequentially forming a gate insulating layer, a silicon layer, and a conductor layer including a lower layer and an upper layer on the gate line, forming a photoresist film, on the conductor layer, patterning the photoresist film to form a photoresist pattern including a first portion and a second portion having a greater thickness than the first portion, etching the upper layer and the lower layer by using the photoresist pattern as art etch mask, etching the silicon layer by using the photoresist pattern as an etch mask to form a semiconductor, removing the second portion of the photoresist pattern by using an etch back process, selectively wet-etching the upper layer of the conductor layer by using the photoresist pattern as an etch mask, dry-etching the lower layer of the conductor layer by using the photoresist pattern as an etch mask to form a data line and a drain electrode including remaining upper and lower layers, and forming a pixel electrode connected to the drain electrode. | 08-28-2008 |
| 20080213702 | METHOD FOR PATTERNING CONDUCTIVE POLYMER - A method for patterning a conductive polymer that adheres well to an oxide layer is presented. The method includes forming a self-assembled monolayer on a substrate, patterning the self-assembled monolayer, forming a catalyst layer on the self-assembled monolayer, and forming a conductive polymer layer on the self-assembled monolayer. | 09-04-2008 |
| 20080248617 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A display substrate includes a base substrate, a first metal pattern, a gate insulating layer, a second metal pattern, a channel layer and a pixel electrode. The first metal pattern is formed on the base substrate, and includes a gate line and a gate electrode of a switching element. The gate insulating layer is formed on the base substrate including the first metal pattern. The second metal pattern is formed on the gate insulating layer, and includes a source electrode, a drain electrode and a source line. The channel layer is formed under the second metal pattern, and is patterned to have substantially a same side surface as a side surface of the second metal pattern. The pixel electrode is electrically connected to the drain electrode. Therefore, an afterimage on a display panel, thus improving display quality. | 10-09-2008 |
| 20080308795 | Thin film transistor array panel and manufacturing method thereof - The disclosed thin film transistor array panel includes an insulating substrate, a channel layer including an oxide formed on the insulating substrate. A gate insulating is layer formed on the channel layer and a gate electrode is formed on the gate insulating layer. An interlayer insulating layer is formed on the gate electrode and a data line formed on the interlayer insulating layer and includes a source electrode, wherein the data line is made of a first conductive layer and a second conductive layer. A drain electrode formed on the interlayer insulating layer, and includes the first conductive layer and the second conductive layer. A pixel electrode extends from the first conductive layer of the drain electrode and a passivation layer formed on the data line and the drain electrode. A spacer formed on the passivation layer. | 12-18-2008 |
| 20080308826 | THIN-FILM TRANSISTOR, ARRAY SUBSTRATE HAVING THE THIN-FILM TRANSISTOR AND METHOD OF MANUFACTURING THE ARRAY SUBSTRATE - A thin-film transistor includes a semiconductor pattern, source and drain electrodes and a gate electrode, the semiconductor pattern is formed on a base substrate, and the semiconductor pattern includes metal oxide. The source and drain electrodes are formed on the semiconductor pattern such that the source and drain electrodes are spaced apart from each other and an outline of the source and drain electrodes is substantially same as an outline of the semiconductor pattern. The gate electrode is disposed in a region between the source and drain electrodes such that portions of the gate electrode are overlapped with the source and drain electrodes. Therefore, leakage current induced by light is minimized. As a result, characteristics of the thin-film transistor are enhanced, after-image is reduced to enhance display quality, and stability of manufacturing process is enhanced. | 12-18-2008 |
| 20080314628 | METHOD OF FORMING METAL PATTERN, PATTERNED METAL STRUCTURE, AND THIN FILM TRANSISTOR-LIQUID CRYSTAL DISPLAYS USING THE SAME - Disclosed is a method of forming a metal pattern, the method comprising depositing a dielectric substrate on a supporting substrate; forming a latent mask pattern of a metal pattern on the dielectric substrate; etching the dielectric substrate exposed by the latent mask pattern; forming a seed layer on the supporting substrate by activating the supporting substrate; removing the latent mask pattern and the portion of the seed layer disposed on the latent mask pattern through a lift-off process; and plating a metal layer on the patterned seed layer. | 12-25-2008 |
| 20090090942 | Wiring structure, array substrate, display device having the same and method of manufacturing the same - A wiring structure includes a substrate, a copper oxide layer having 16˜39 at % oxygen on the substrate and a copper layer on the copper oxide layer. The copper oxide layer has a thickness of 10-1000 Å and the copper layer has a thickness of 300-8000 Å. The copper layer and the copper oxide layer further have an alloy element less than 10 wt % and the alloy element is selected from the group of Ag, Ni, Mg, Zr, N. | 04-09-2009 |
| 20090163022 | TFT ARRAY PANEL - Multi-layered wiring for a larger flat panel display is formed by depositing molybdenum on a substrate in presence of a precursor gas containing at least one oxygen, nitrogen and carbon to form a molybdenum layer. An aluminum layer is deposited on the molybdenum layer. Another metal layer may be formed on the aluminum layer. The molybdenum layer has a face-centered cubic (FCC) lattice structure with a preferred orientation of (111). | 06-25-2009 |
| 20090174835 | LIQUID CRYSTAL DISPLAY AND METHOD OF FABRICATING THE SAME TO HAVE TFT'S WITH PIXEL ELECTRODES INTEGRALLY EXTENDING FROM ONE OF THE SOURCE/DRAIN ELECTRODES - A liquid crystal display (LCD) includes thin film transistors (TFTs) each having spaced apart source/drain electrodes and an oxide-type semiconductive film disposed over and between the source/drain electrodes to define an active layer. Each of the source/drain electrodes includes a portion of a subdivided transparent conductive layer where one subdivision of the transparent conductive layer continues from within its one of the source/drain electrodes to define an optically exposed pixel-electrode that is reliably connected integrally to the one source/drain electrode. Mass production costs can be reduced and production reliability increased because a fewer number of photolithographic masks can be used to form the TFTs. | 07-09-2009 |
| 20090184315 | THIN FILM TRANSISTOR ARRAY SUBSTRATE HAVING IMPROVED ELECTRICAL CHARACTERISTICS AND METHOD OF MANUFACTURING THE SAME - A thin film transistor array substrate, which can have high mobility of charge and can achieve uniform electrical characteristics for wide display devices, and a method of manufacturing the thin film transistor array substrate, are provided. The thin film transistor array substrate includes an oxide semiconductor layer having a channel and formed on an insulating substrate, a gate electrode overlapping the oxide semiconductor layer, a gate insulating film disposed between the oxide semiconductor layer and the gate electrode, and a passivation film formed on the oxide semiconductor layer and the gate electrode. At least one of the gate insulating film and the passivation film contains fluorine-containing silicon. | 07-23-2009 |
| 20090212290 | DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME - A display panel includes; a lower gate line, a lower data line disposed substantially perpendicular to the lower gate line, a thin film transistor (“TFT”) connected to the lower gate line and the lower data line, an insulating layer disposed on the lower gate line, the lower data line, and the TFT and having a plurality of trenches exposing the lower gate line and the lower data line, an upper gate line disposed in the trench on the lower gate line, an upper data line disposed in the trench on the lower data line, and a pixel electrode connected to the TFT. | 08-27-2009 |
| 20090212298 | Thin Film Transistor Substrate Having Nickel-Silicide Layer - Disclosed are a thin film transistor substrate of an LCD device and a method of manufacturing the same. The thin film transistor substrate includes a nickel-silicide layer formed on an insulating layer pattern including silicon and a metal layer formed on the nickel-silicide layer. Nickel is coated on the insulating layer pattern including silicon and a metal material is coated on the nickel-coated layer. After that, a heat treatment is performed at about 200 to about 350° C. to obtain the nickel-silicide layer. Since the thin film transistor substrate of the LCD device is manufactured by applying the nickel-silicide wiring, a device having low resistivity and good ohmic contact property can be obtained. | 08-27-2009 |
| 20090236627 | METHOD OF FORMING METAL WIRING - Provided is a method of forming metal wiring. The method includes forming a photosensitive film pattern on a substrate, hydrophobicizing at least part of the photosensitive film pattern, coating metal ink on the substrate having the photosensitive film pattern, forming a seed layer, and forming a metal layer. Alternatively, a trench is formed by using the photosensitive film pattern as a mask, and metal aerosol is sprayed to form the seed layer and then the metal layer. In this method, there is no need to form a metal thin film on the photosensitive film pattern when the seed layer is formed. As a result, less metal is wasted, which, in turn, significantly reduces manufacturing costs. | 09-24-2009 |
| 20090286386 | WIRE STRUCTURE, METHOD OF FORMING WIRE, THIN FILM TRANSISTOR SUBSTRATE, AND METHOD OF MANUFACTURING THIN FILM TRANSISTOR SUBSTRATE - Provided are a wire structure, a method of forming a wire, a thin film transistor (TFT) substrate, and a method of manufacturing the TFT substrate. The wire structure includes a barrier layer disposed on a lower structure, a copper conductive layer comprising copper or copper alloy disposed on the barrier layer, an intermediate layer comprising copper nitride disposed on the copper conductive layer, and a capping layer disposed on the intermediate layer. | 11-19-2009 |
| 20100022041 | THIN FILM TRANSISTOR ARRAY PANEL INCLUDING LAYERED LINE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - The present invention provides a thin film transistor array panel comprising an insulating substrate; a gate line formed on the insulating substrate; a gate insulating layer formed on the gate line; a drain electrode and a data line having a source electrode formed on the gate insulating layer, the drain electrode being adjacent to the source electrode with a gap therebetween; and a pixel electrode coupled to the drain electrode, wherein at least one of the gate line, the data line, and the drain electrode comprises a first conductive layer comprising a conductive oxide and a second conductive layer comprising copper (Cu). | 01-28-2010 |
| 20100022055 | THIN FILM TRANSISTOR, THIN FILM TRANSISTOR SUBSTRATE INCLUDING THE SAME AND METHOD OF MANUFACTURING THE SAME - A thin film transistor showing desirable contact characteristics during contact with indium tin oxide (ITO) or indium zinc oxide (IZO), in which a first conductive pattern including a gate electrode and a second conductive pattern including a source electrode and a drain electrode are formed without an etching process, a TFT substrate including the TFTs, and a method of manufacturing the same. The thin film transistor includes a gate electrode formed of a first conductive layer, a gate insulating layer covering the gate electrode, a semiconductor layer forming a channel on the gate insulating layer; an ohmic contact layer formed on the semiconductor layer, and a source electrode and a drain electrode formed of a second conductive layer and of a third conductive layer. The second conductive layer includes an aluminum-nickel alloy and nitrogen and is formed on the semiconductor layer. The third conductive layer includes an aluminum-nickel alloy and is formed on the second conductive layer. | 01-28-2010 |
| 20100148169 | THIN-FILM TRANSISTOR SUBSTRATE AND METHOD OF FABRICATING THE SAME - A thin-film transistor (TFT) substrate has improved electrical properties and reduced appearance defects and a method of fabricating the TFT substrate, are provided. The TFT substrate includes: gate wiring which is formed on a surface of an insulating substrate; oxide active layer patterns which are formed on the gate wiring and include an oxide of a first material; buffer layer patterns which are disposed on the oxide active layer patterns to directly contact the oxide active layer patterns and include a second material; and data wiring which is formed on the buffer layer patterns to insulatedly cross the gate wiring, wherein a Gibbs free energy of the oxide of the first material is lower than a Gibbs free energy of an oxide of the second material. | 06-17-2010 |
| 20100149476 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A display substrate includes; a base substrate, a deformation preventing layer disposed on a lower surface of the base substrate, wherein the deformation preventing layer applies a force to the base substrate to prevent the base substrate from bending, a gate line disposed on an upper surface of the base substrate, a data line disposed on the base substrate, and a pixel electrode disposed on the base substrate. | 06-17-2010 |
| 20100276686 | THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF FABRICATING THE SAME - A thin film transistor (TFT) substrate and a method of fabricating the same are provided. The thin film transistor substrate may have low resistance characteristics and may have reduced mutual diffusion and contact resistance between an active layer pattern and data wiring. The thin film transistor substrate may include gate wiring formed on an insulating substrate. Oxide active layer patterns may be formed on the gate wiring and may include a first substance. Data wiring may be formed on the oxide active layer patterns to cross the gate wiring and may include a second substance. Barrier layer patterns may be disposed between the oxide active layer patterns and the data wiring and may include a third substance. | 11-04-2010 |
| 20110012203 | THIN FILM TRANSISTOR PANEL AND FABRICATING METHOD THEREOF - A thin film transistor panel includes; an insulating substrate, a gate line including a gate electrode disposed on the insulating substrate, a gate insulating layer disposed on the gate electrode, a semiconductor layer disposed on the gate insulating layer, the semiconductor layer including a sidewall, a data line including a source electrode disposed on the semiconductor layer, a drain electrode disposed substantially opposite to and spaced apart from the source electrode, a first protective film disposed on the data line, the first protective film including a sidewall, a second protective film disposed on the first protective film and including a sidewall, and a pixel electrode electrically connected to the drain electrode, wherein the sidewall of the second protective film is disposed inside an area where the sidewall of the first protective film is disposed, and the source electrode and the drain electrode cover the sidewall of the semiconductor layer. | 01-20-2011 |
| 20110031117 | SPUTTERING TARGET APPARATUS - A sputtering target apparatus is provided. The sputtering target apparatus includes a first target assembly including a first target array having a first target, a second target disposed adjacent to the first target, and a first target dividing region disposed between the first and second targets, the first target assembly extending along a first direction, wherein the first target dividing region has a longitudinal cross-section that is oblique with respect to the first direction. | 02-10-2011 |
| 20110047792 | WIRE STRUCTURE, METHOD FOR FABRICATING WIRE, THIN FILM TRANSISTOR SUBSTRATE, AND METHOD FOR FABRICATING THIN FILM TRANSISTOR SUBSTRATE - Provided are a wire structure, a method for fabricating a wire, a thin film transistor (TFT) substrate, and a method for fabricating a TFT substrate. The wire structure includes a barrier layer formed on a substrate and including copper nitride and a copper conductive layer formed on the barrier layer and including copper or a copper alloy | 03-03-2011 |
| 20110065220 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME - The present invention provides a thin film transistor array panel comprising: an insulating substrate; a gate line formed on the insulating substrate and having a gate electrode; a gate insulating layer formed on the gate line; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; diffusion barriers formed on the semiconductor and containing nitrogen; a data line crossing the gate line and having a source electrode partially contacting the diffusion barriers; a drain electrode partially contacting the diffusion barriers and facing the source electrode on the gate electrode; and a pixel electrode electrically connected to the drain electrode. | 03-17-2011 |
| 20110068340 | Thin Film Transistor Array Panel and Method for Manufacturing the Same - A thin film transistor array panel includes an insulating substrate. A gate line is formed on the insulating substrate and has a gate electrode. A gate insulating layer is formed on the gate line. A semiconductor layer is formed on the gate insulating layer and overlaps the gate electrode. Diffusion barriers are formed on the semiconductor layer and contain nitrogen. A data line crosses the gate line and has a source electrode partially contacting the diffusion barriers and a drain electrode partially contacting the diffusion barriers and facing the source electrode. The drain electrode is on the gate electrode. A pixel electrode is electrically connected to the drain electrode. | 03-24-2011 |
| 20110114940 | THIN FILM DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME - A thin film transistor array panel includes: a substrate; a gate line disposed on the substrate and including a gate electrode; a gate insulating layer disposed on the gate line; an semiconductive oxide layer disposed on the gate insulating layer; a data line disposed on the semiconductive oxide layer and including a source electrode; a drain electrode facing the source electrode on the semiconductive oxide layer; and a passivation layer disposed on the data line. The semiconductive oxide layer is patterned with chlorine (Cl) containing gas which alters relative atomic concentrations of primary semiconductive characteristic-providing elements of the semiconductive oxide layer at least at a portion where a transistor channel region is defined. | 05-19-2011 |
| 20110124163 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME - A manufacturing method of a thin film transistor (TFT) includes forming a gate electrode including a metal that can be combined with silicon to form silicide on a substrate and forming a gate insulation layer by supplying a gas which includes silicon to the gate electrode at a temperature below about 280° C. The method further includes forming a semiconductor on the gate insulation layer, forming a data line and a drain electrode on the semiconductor and forming a pixel electrode connected to the drain electrode. | 05-26-2011 |
| 20110140103 | THIN-FILM TRANSISTOR, ARRAY SUBSTRATE HAVING THE THIN-FILM TRANSISTOR AND METHOD OF MANUFACTURING THE ARRAY SUBSTRATE - A thin-film transistor includes a semiconductor pattern, source and drain electrodes and a gate electrode, the semiconductor pattern is formed on a base substrate, and the semiconductor pattern includes metal oxide. The source and drain electrodes are formed on the semiconductor pattern such that the source and drain electrodes are spaced apart from each other and an outline of the source and drain electrodes is substantially same as an outline of the semiconductor pattern. The gate electrode is disposed in a region between the source and drain electrodes such that portions of the gate electrode are overlapped with the source and drain electrodes. Therefore, leakage current induced by light is minimized. As a result, characteristics of the thin-film transistor are enhanced, after-image is reduced to enhance display quality, and stability of manufacturing process is enhanced. | 06-16-2011 |
| 20110140111 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME - A thin film transistor array panel is provided and includes a gate line, a gate insulating layer covering the gate line, a semiconductor layer disposed on the gate insulating layer, and a data line and a drain electrode disposed on the semiconductor layer. The data line and the drain electrode have a dual-layered structure including a lower layer and an upper layer with the lower layer having a first portion protruded outside the upper layer and the semiconductor layer having a second portion protruded outside the edge of the lower layer. | 06-16-2011 |
