| Patent application number | Description | Published |
|---|
| 20080203387 | Thin film transistor and method of manufacturing the same - Provided are a thin film transistor and a method of manufacturing the same. The thin film transistor may include a gate; a channel layer; a source and a drain, the source and the drain being formed of metal; and a metal oxide layer, the metal oxide layer being formed between the channel layer and the source and the drain. The metal oxide layer may have a gradually changing metal content between the channel layer and the source and the drain. | 08-28-2008 |
| 20080206923 | Oxide semiconductor target, method of forming the same, method of forming oxide semiconductor layer using the same and method of manufacturing semiconductor device using the same - Provided are a method of forming an oxide semiconductor layer and a method of manufacturing a semiconductor device using the method of forming an oxide semiconductor layer. The method may include mounting an oxide semiconductor target in a chamber; loading a substrate into the chamber; vacuuming the chamber; applying a direct current power to the oxide semiconductor target while injecting oxygen and a sputtering gas into the chamber; and forming an oxide semiconductor layer on a surface of the substrate by applying plasma of the sputtering gas onto the oxide semiconductor target. Here, the oxide semiconductor target may have a resistance of 1 kΩ or less. The oxide semiconductor target may have a composition of x(first oxide).y(second oxide).z(third oxide) where x, y and z are molar ratios. Each of the first through third oxides may be one of Ga | 08-28-2008 |
| 20080237687 | Flash memory device - Provided is a flash memory device including a gate structure on a substrate. The flash memory device includes a charge supply layer including a ZnO based material formed between a substrate and a gate structure or formed on the gate structure. Accordingly, the flash memory device can be formed to be of a bottom gate type or of a top gate type by including the charge supply layer. Also, the flash memory device may be realized to be any of a charge trap type and a floating gate type. | 10-02-2008 |
| 20080258141 | Thin film transistor, method of manufacturing the same, and flat panel display having the same - A thin film transistor (TFT), a method of manufacturing the TFT, and a flat panel display comprising the TFT are provided. The TFT includes a gate, a gate insulating layer that contacts the gate, a channel layer that contacts the gate insulating layer and faces the gate with the gate insulating layer therebetween, a source that contacts an end of the channel layer; and a drain that contacts an other end of the channel layer, wherein the channel layer is an amorphous oxide semiconductor layer, and each of the source and the drain is a conductive oxide layer comprising an oxide semiconductor layer having a conductive impurity in the oxide semiconductor layer. A low resistance metal layer can further be included on the source and drain. A driving circuit of a unit pixel of a flat panel display includes the TFT. | 10-23-2008 |
| 20080315193 | Oxide-based thin film transistor, method of fabricating the same, zinc oxide etchant, and a method of forming the same - Provided is a zinc (Zn) oxide-based thin film transistor that may include a gate, a gate insulating layer on the gate, a channel including zinc oxide and may be on a portion of the gate insulating layer, and a source and drain contacting respective sides of the channel. The zinc (Zn) oxide-based thin film transistor may further include a recession in the channel between the source and the drain, and a zinc oxide-based etchant may be used to form the recession. | 12-25-2008 |
| 20080315194 | Oxide semiconductors and thin film transistors comprising the same - Oxide semiconductors and thin film transistors (TFTs) including the same are provided. An oxide semiconductor includes Zn atoms and at least one of Ta and Y atoms added thereto. A thin film transistor (TFT) includes a channel including an oxide semiconductor including Zn atoms and at least one of Ta and Y atoms added thereto. | 12-25-2008 |
| 20080315200 | Oxide semiconductors and thin film transistors comprising the same - Oxide semiconductors and thin film transistors (TFTs) including the same are provided. An oxide semiconductor includes Zn atoms and at least one of Hf and Cr atoms added thereto. A thin film transistor (TFT) includes a channel including an oxide semiconductor including Zn atoms and at least one of Hf and Cr atoms added thereto. | 12-25-2008 |
| 20090001432 | Channel layer for a thin film transistor, thin film transistor including the same, and methods of manufacturing the same - Provided is a channel layer for a thin film transistor, a thin film transistor and methods of forming the same. A channel layer for a thin film transistor may include IZO (indium zinc oxide) doped with a transition metal. A thin film transistor may include a gate electrode and the channel layer formed on a substrate, a gate insulating layer formed between the gate electrode and channel layer, and a source electrode and a drain electrode which contact ends of the channel layer. | 01-01-2009 |
| 20090008638 | Oxide semiconductor, thin film transistor including the same and method of manufacturing a thin film transistor - Example embodiments relate to an oxide semiconductor including zinc oxide (ZnO), a thin film transistor including a channel formed of the oxide semiconductor and a method of manufacturing the thin film transistor. The oxide semiconductor may include a Ga | 01-08-2009 |
| 20090057663 | Oxide thin film transistor and method of manufacturing the same - An oxide thin film transistor and a method of manufacturing the oxide TFT are provided. The oxide thin film transistor (TFT) including: a gate; a channel formed to correspond to the gate, and a capping layer having a higher work function than the channel; a gate insulator disposed between the gate and the channel; and a source and drain respectively contacting either side of the capping layer and the channel and partially on a top surface of the capping layer. | 03-05-2009 |
| 20090294764 | Oxide semiconductors and thin film transistors comprising the same - Provided are oxide semiconductors and thin film transistors of the same. An oxide semiconductor includes Zn, In and Hf. The amount of Hf is in the range of about 2-16 at %, inclusive, based on the total amount of Zn, In, and Hf. A thin film transistor includes a gate and a gate insulating layer arranged on the gate. A channel corresponding to the gate is formed on the gate insulating layer. The channel includes an oxide semiconductor. The semiconductor oxide includes Zn, In and Hf. The amount of Hf is in the range of about 2-16 at %, inclusive, based on the total amount of Zn, In, and Hf. A source and a drain contact respective sides of the channel. | 12-03-2009 |
| 20100006834 | Channel layers and semiconductor devices including the same - Channel layers and semiconductor devices including the channel layers are disclosed. A channel layer may include a multi-layered structure. Layers forming the channel layer may have different carrier mobilities and/or carrier densities. The channel layer may have a double layered structure including a first layer and a second layer which may be formed of different oxides. Characteristics of the transistor may vary according to materials used to form the channel layers and/or thicknesses thereof. | 01-14-2010 |
| 20100044700 | Oxide semiconductor and thin film transistor including the same - Disclosed are an oxide semiconductor and a thin film transistor (TFT) including the same. The oxide semiconductor may include a lanthanoid (Ln) added to zinc oxide (ZnO) and may be used as a channel material of the TFT. | 02-25-2010 |
| 20100091541 | Stacked memory device and method thereof - A stacked memory device includes a plurality of memory layers, where at least one of the plurality of memory layers is stacked on another of the plurality of memory layers and each of the memory layers includes an array of memory cells, a first active circuit unit configured to classify and process address information for at least one of the memory cells as vertical address information and horizontal address information, and at least one second active circuit unit configured to generate a memory selection signal for at least one of the memory cells based on signals processed by the first active circuit unit. | 04-15-2010 |
| 20100117684 | Inverter and logic device comprising the same - The inverter includes a driving transistor and a loading transistor having channel regions with different thicknesses. The channel region of the driving transistor may be thinner than the channel region of the load transistor. A channel layer of the driving transistor may have a recessed region between a source and a drain which contact both ends of the channel layer. The driving transistor may be an enhancement mode transistor and the load transistor may be a depletion mode transistor. | 05-13-2010 |
| 20100133496 | Resistive random access memory - A RRAM may include a first electrode, a second electrode, and a memory resistant layer between the first and second electrodes, wherein the memory resistant layer may include a transition metal oxide doped with a metal having a high oxygen affinity. Because a RRAM includes a memory resistant layer doped with a material having a high oxygen affinity, the RRAM may be stably driven at higher temperatures. | 06-03-2010 |
| 20100140608 | Transistor and method of manufacturing the same - Example embodiments provide a transistor and a method of manufacturing the same. The transistor may include a channel layer formed of an oxide semiconductor and a gate having a three-dimensional structure. A plurality of the transistors may be stacked in a perpendicular direction to a substrate. At least some of the plurality of transistors may be connected to each other. | 06-10-2010 |
| 20100148825 | Semiconductor devices and methods of fabricating the same - Provided are a semiconductor device and a method of fabricating the semiconductor device. The semiconductor device may be a complementary device including a p-type oxide TFT and an n-type oxide TFT. The semiconductor device may be a logic device such as an inverter, a NAND device, or a NOR device. | 06-17-2010 |
| 20100149138 | Display apparatuses and methods of operating the same - Provided are display apparatuses and methods of operating the same. In a display apparatus, a display image may be continuously held for longer than about 10 msec after the power of the display panel is turned off. The display apparatus may indicate a liquid crystal display (LCD) apparatus including an oxide thin film transistor (TFT). Off leakage current of the oxide TFT may be less than about 10 | 06-17-2010 |
| 20100176393 | Oxide semiconductor and thin film transistor including the same - Provided are an oxide semiconductor and a thin film transistor including the oxide semiconductor. The oxide semiconductor may be formed of indium (In) oxide and hafnium (Hf) and may be a channel material of the thin film transistor. | 07-15-2010 |
| 20100264956 | Inverter, method of manufacturing the same, and logic circuit including the inverter - Provided are an inverter, a method of manufacturing the inverter, and a logic circuit including the inverter. The inverter may include a first transistor and a second transistor having different channel layer structures. A channel layer of the first transistor may include a lower layer and an upper layer, and a channel layer of the second transistor may be the same as one of the lower layer and the upper layer. At least one of the lower layer and the upper layer may be an oxide layer. The inverter may be an enhancement/depletion (E/D) mode inverter or a complementary inverter. | 10-21-2010 |
| 20100295579 | Inverter and logic device comprising the same - The inverter includes a driving transistor and a loading transistor having channel regions with different thicknesses. The channel region of the driving transistor may be thinner than the channel region of the load transistor. A channel layer of the driving transistor may have a recessed region between a source and a drain which contact both ends of the channel layer. The driving transistor may be an enhancement mode transistor and the load transistor may be a depletion mode transistor. | 11-25-2010 |
| 20100308297 | Heterojunction diode, method of manufacturing the same, and electronic device including the heterojunction diode - Example embodiments relate to a heterojunction diode, a method of manufacturing the heterojunction diode, and an electronic device including the heterojunction diode. The heterojunction diode may include a first conductive type non-oxide layer and a second conductive type oxide layer bonded to the non-oxide layer. The non-oxide layer may be a Si layer. The Si layer may be a p++ Si layer or an n++ Si layer. A difference in work functions of the non-oxide layer and the oxide layer may be about 0.8-1.2 eV. Accordingly, when a forward voltage is applied to the heterojunction diode, rectification may occur. The heterojunction diode may be applied to an electronic device, e.g., a memory device. | 12-09-2010 |
| 20110001746 | Apparatuses for and methods of displaying three-dimensional images - An apparatus for displaying a three-dimensional (3D) image may include a plurality of display panels and a controller configured to apply image signals to each of the plurality of display panels. At least one of the display panels may include a transparent display panel. The plurality of display panels may be spaced apart from each other in a depth direction. A method of displaying a three-dimensional (3D) image may include displaying plane images on each of a plurality of display panels. At least one of the plurality of display panels may include a transparent display panel. The plurality of display panels may be spaced apart from each other in a depth direction. | 01-06-2011 |
| 20110049464 | Resistive random access memory device and memory array including the same - A resistive random access memory (RRAM) includes a resistive memory layer of a transition metal oxide, such as Ni oxide, and is doped with a metal material. The RRAM may include at least one first electrode, a resistive memory layer on the at least one first electrode, the resistive memory layer including a Ni oxide layer doped with at least one element selected from a group consisting of Fe, Co, and Sn, and at least one second electrode on the resistive memory layer. The RRAM device may include a plurality of first electrodes and a plurality of second electrodes, and the resistive memory layer may be between the plurality of first electrodes and the plurality of second electrodes. | 03-03-2011 |
| 20110085368 | Non-volatile memory device and method of manufacturing the same - The non-volatile memory device may include a substrate, a plurality of first signal lines on the substrate in a vertical direction, a plurality of memory cells having ends connected to the plurality of first signal lines, a plurality of second signal lines perpendicular to the plurality of first signal lines on the substrate and each connected to other ends of the plurality of memory cells, and a plurality of selection elements on the substrate and connected to at least two of the plurality of first signal lines. | 04-14-2011 |
| 20110101342 | ZnO based semiconductor devices and methods of manufacturing the same - A semiconductor device may include a composite represented by Formula 1 below as an active layer. | 05-05-2011 |
| 20110101343 | ZnO based semiconductor devices and methods of manufacturing the same - A semiconductor device may include a composite represented by Formula 1 below as an active layer. | 05-05-2011 |
| 20110108704 | Image sensors and methods of operating the same - Image sensors and methods of operating the same. An image sensor includes a pixel array including a plurality of pixels. Each of the plurality of pixels includes a photo sensor, the voltage-current characteristics of which vary according to energy of incident light, and that generates a sense current determined by the energy of the incident light; a reset unit that is activated to generate a reference current, according to a reset signal for resetting at least one of the plurality of pixels; and a conversion unit that converts the sense current and the reference current into a sense voltage and a reference voltage, respectively. | 05-12-2011 |
| 20110108835 | Transistors, methods of manufacturing a transistor and electronic devices including a transistor - A transistor, a method of manufacturing a transistor, and an electronic device including a transistor are provided, the transistor may include a channel layer having a multi-layer structure. The channel layer may have a double layer structure or a triple layer structure. At least two layers of the channel layer may have different oxygen concentrations. | 05-12-2011 |
| 20110114939 | Transistors, electronic devices including a transistor and methods of manufacturing the same - Transistors, electronic devices including a transistor and methods of manufacturing the same are provided, the transistor includes an oxide semiconductor layer (as a channel layer) having compositions that vary in one direction. The channel layer may be an oxide layer including a first element, a second element, and Zn, which are metal elements. The amount of at least one of the first element, the second element, and Zn may change in a deposition direction of the channel layer. The first element may be any one of hafnium (Hf), yttrium (Y), tantalum (Ta), zirconium (Zr), gallium (Ga), aluminum (Al) or combinations thereof. The second element may be indium (In). The channel layer may have a multi-layered structure including at least two layers with different compositions. | 05-19-2011 |
| 20110128772 | Nonvolatile memory cells and nonvolatile memory devices including the same - A nonvolatile memory cell may include a bidirectional switch having a first threshold voltage when a forward current is applied to the bidirectional switch and a second threshold voltage when a reverse current is applied to the bidirectional switch; and a variable resistor connected to the bidirectional switch in series. A state of resistance of the variable resistor may be controlled according to voltage applied to the variable resistor. A sum of a magnitude of the first threshold voltage and a magnitude of the second threshold voltage may be greater than a write voltage that is used to perform a write operation on the variable resistor. | 06-02-2011 |
| 20110141060 | Optical touch panels and methods of driving the same - An optical touch panel may include a plurality of light-sensing areas. The plurality of light-sensing areas may be integrally formed with pixels in a display panel or may be formed on the display panel, in order to sense incident light from outside the optical touch panel. A method of driving an optical touch panel may include sensing a change in an output from a plurality of light-sensing areas between two time points and determining that there is an optical input when the change in the output is greater than or equal to a first reference value that is defined in advance. The light-sensing areas may be integrally formed with pixels in a display panel or formed on a surface of the display panel, for sensing incident light from outside the optical touch panel. | 06-16-2011 |
| 20110147696 | Resistive random access memory devices and resistive random access memory arrays having the same - A resistive random access memory (RRAM) devices and resistive random access memory (RRAM) arrays are provided, the RRAM devices include a first electrode layer, a variable resistance material layer formed of an oxide of a metallic material having a plurality of oxidation states, an intermediate electrode layer on the variable resistance material layer and formed of a conductive material having a lower reactivity with oxygen than the metallic material, and a second electrode layer on the intermediate electrode layer. The RRAM arrays include at least one of the aforementioned RRAM devices. | 06-23-2011 |
| 20110147734 | Transistor, method of manufacturing transistor, and electronic device including transistor - Provided are a transistor, a method of manufacturing the transistor, and an electronic device including the transistor. The transistor may include a gate insulator of which at least one surface is treated with plasma. The surface of the gate insulator may be an interface that contacts a channel layer. The interface may be treated with plasma by using a fluorine (F)-containing gas, and thus may include fluorine (F). The interface treated with plasma may suppress the characteristic variations of the transistor due to light. | 06-23-2011 |
| 20110156020 | Transistor - Provided is a transistor including a semiconductor insertion layer between a channel layer and a source electrode. A potential barrier between the channel layer and the source electrode may be increased by the semiconductor insertion layer. The channel layer may be an oxide semiconductor layer. The transistor may be an enhancement mode transistor. | 06-30-2011 |
