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Chang, Jhubei City
Chang-Shao Chang, Jhubei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090195357 | Active transmission architecture without battery and application - An active transmission architecture without battery and the application are proposed, which make use of an analog front-end circuit to convert a received carrier into a dc signal for providing power for the active transmission architecture without battery, and therefore actively produces a replying signal with the same or different frequencies from the carrier. It is not necessary to add an extra power circuit, hence accomplishing the advantage of no battery. The proposed active transmission architecture without battery can apply to RFID systems or be used in applications that require transmitter and receiver modules. | 08-06-2009 |
Chia-Yang Chang, Jhubei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080303109 | Optoelectronic device chip having a composite spacer structure and method making same - An optoelectronic device chip, and a method for making the chip, are disclosed. The chip comprises a device substrate, an optically transparent upper substrate, and a composite spacer layer which includes an adhesive material and a plurality of particles dispersed in said adhesive material. The distance between the device substrate and the upper substrate is controlled by the thickness of the composite spacer layer so that the variation is within the depth of focus of optical system. | 12-11-2008 |
Chien-Hsiung Chang, Jhubei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110080913 | APPARATUS AND METHOD FOR LAYER-2 TO 7 SEARCH ENGINE FOR HIGH SPEED NETWORK APPLICATION - High-speed networking application equipments with a layer-2 to layer-7 hardware search engine and method are with flexibility and performance improvement. The multi-layer switches/routers, network address translation (NAT) gateway, firewall/VPN router and network attached storage (NAS) may use the search engine for fast and efficient search requirement. | 04-07-2011 |
Chung-Min Chang, Jhubei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100328947 | LIGHT-EMITTING DIODE LIGHT SOURCE ASSEMBLY WITH HEAT DISSIPATION BASE - A light-emitting diode (LED) light source assembly with a heat dissipation base is provided. The LED light source assembly includes the heat dissipation base and a light bar. The light bar includes a flexible printed circuit (FPC) board and at least one LED unit which is disposed on the FPC board and electrically connected to the FPC board. The heat dissipation base has two retaining recesses for lodging the side portions of the FPC board, so the FPC board can be thermally conductively connected to the heat dissipation base. Because of the flexibility of the FPC board, it is easy to lodge the FPC board in the heat dissipation base via the retaining recesses. Thus, the cost for arranging the light bar can be economized. | 12-30-2010 |
| 20110005573 | FOLDABLE SOLAR ENERGY APPARATUS - A foldable solar energy apparatus is provided. The foldable solar energy apparatus includes a frame, a first solar energy module, an actuation module, and a power module. A photovoltaic panel is coupled to a first holder of the first solar energy module, and electricity generated by the photovoltaic panel is stored in the power module. The first holder is rotatably coupled to the frame so that the first holder is collapsible via the actuation module, which is disposed at the frame and connected to the first holder. The first holder and the actuation module provide the solar energy apparatus with a foldable function. Thus, the solar energy apparatus can be folded in response to changes in weather conditions, thereby preventing the photovoltaic panel from being damaged by bad weather. | 01-13-2011 |
| 20110141731 | REFLECTION-TYPE LIGHT-EMITTING ASSEMBLY - A reflection-type light-emitting assembly is provided. The reflection-type light-emitting assembly includes a reflector and a plurality of light-emitting elements. The reflector has a concave-shape body and a supporter. The supporter is formed by extending the rim of the concave-shape body toward the center thereof, so as to form a light-emitting opening of the reflector. The light-emitting elements are arranged on the supporter. Light rays emitted by the light-emitting elements fall on a reflecting surface of the reflector and then reflect off the reflecting surface to thereby exit the light-emitting opening. The light rays reflected off the reflecting surface and out the reflector are relatively soft rather than glaringly uncomfortable to the human eyes. | 06-16-2011 |
Chun-Lin Chang, Jhubei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100181500 | METHOD AND SYSTEM FOR LOW TEMPERATURE ION IMPLANTATION - A method comprises pre-cooling a first semiconductor wafer outside of a process chamber, from a temperature at or above 15° C. to a temperature below 5° C. The pre-cooled first wafer is placed inside the process chamber after performing the pre-cooling step. A low-temperature ion implantation is performed on the first wafer after placing the first wafer. | 07-22-2010 |
| 20100240224 | MULTI-ZONE SEMICONDUCTOR FURNACE - A semiconductor furnace suitable for chemical vapor deposition processing of wafers. The furnace includes a thermal reaction chamber having a top, a bottom, a sidewall, and an internal cavity for removably holding a batch of vertically stacked wafers. A heating system is provided that includes a plurality of heaters arranged and operative to heat the chamber. The heating system includes at least one top heater; at least one bottom heater, and a plurality of sidewall heaters spaced along the height of the reaction chamber to control temperature variations within in the chamber and promote uniform film deposit thickness on the wafers. | 09-23-2010 |
| 20100248496 | ROTATABLE AND TUNABLE HEATERS FOR SEMICONDUCTOR FURNACE - A semiconductor furnace suitable for chemical vapor deposition processing of wafers. The furnace includes a thermal reaction chamber having a top, a bottom, a sidewall, and an internal cavity for removably holding a batch of vertically stacked wafers. A heating system is provided that includes a plurality of rotatable heaters arranged and operative to heat the chamber. In one embodiment, spacing between the sidewall heaters is adjustable. The heating system controls temperature variations within the chamber and promotes uniform film deposit thickness on the wafers. | 09-30-2010 |
Hsiao-Te Chang, Jhubei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100174852 | METHOD FOR OPERATING NON-VOLATILE MEMORY AND DATA STORAGE SYSTEM USING THE SAME - A method for operating a non-volatile memory is provided. The non-volatile memory includes a plurality of physical blocks haing a plurality of data blocks and spare blocks. An index is obtained by comparing an average erase count of selected physical blocks with a first threshold. Each erase count for each physical block is the total number of the erase operations performed thereon. A performance capability status for the memory is determined according to the index. The performance capability status is set to a first status when the average erase count exceeds the first threshold. An indication is generated based on the performance capability status. A limp function is performed in response to the first status for configuring a minimum number of the at least some spare blocks reserved and used for data update operations. | 07-08-2010 |
| 20110119430 | METHODS FOR MEASURING USABLE LIFESPAN AND REPLACING AN IN-SYSTEM PROGRAMMING CODE OF A MEMORY DEVICE, AND DATA STORAGE SYSEM USING THE SAME - A data storage system comprises a host and a flash memory device having a non-non-volatile memory. A controller of the flash memory device calculates an average erase count of the flash memory to obtaining a remaining period of time indicating usable lifespan of the flash memory device. The host obtains an index by comparing the average erase count with a first threshold and determines a performance capability status for the flash memory device. The performance capability status is set to a first status when the average erase count exceeds the first threshold. The host generates an indication based on the performance capability status and performs a limp function responsive to the first status. The limp function loads a predetermined in-system programming code for replacing an original one to configure a minimum number of at least some spare blocks of the flash memory reserved and used for data update operations. | 05-19-2011 |
Jiun-Jian Chang, Jhubei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100098038 | DEPLOY APPARATUS, METHOD, AND COMPUTER PROGRAM PRODUCT THEREOF FOR A WIRELESS NETWORK - A deploy apparatus, method and computer program product thereof for a wireless network are provided. The wireless network comprises at least one first network node and a second network node. The method comprises the following steps: calculating an output constant and a node constant according to a first default value, a second default value and a third default value; calculating a first evaluation function according to the related information of the network nodes of the wireless network; moving or removing the second network node from the wireless network when the output constant is smaller than one and a test value is smaller than the node constant; calculating a second evaluation function according to the related information of the network nodes of the wireless network; and deploying the wireless network after comparing the first evaluation function and the second evaluation function. | 04-22-2010 |
Jong-Yuh Chang, Jhubei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100119958 | MASK BLANK, MASK FORMED FROM THE BLANK, AND METHOD OF FORMING A MASK - A mask for manufacturing a semiconductor device comprises a transparent substrate. A metal-containing layer overlies the transparent substrate in a first region. A capping layer overlies and is coextensive with the metal-containing layer without wrapping around side edges of the metal-containing layer. The capping layer is substantially free of nitride. The transparent substrate has a second region separate from the first region. The transparent substrate is exposed in the second region. | 05-13-2010 |
| 20100271612 | METHOD AND PELLICLE MOUNTING APPARATUS FOR REDUCING PELLICLE INDUCED DISTORTION - An apparatus for mounting a pellicle onto a mask is provided. In one embodiment, the apparatus comprises a base provided with a track; a dummy plate holder coupled to the base, the dummy plate holder for receiving a dummy plate having an elevated portion on one side thereof; a mask holder for receiving a mask, the mask holder slidably coupled to the base; a pellicle holder for receiving a pellicle frame, the pellicle holder slidably coupled to the base; and drive means being adapted to drive the pellicle holder along the track towards the dummy plate holder, wherein during operation when the pellicle frame is mounted onto the mask causing the mask to contact the dummy plate, the mounting pressure in the mask is distributed by way of the elevated portion in the dummy plate, thus reducing distortion in the mask. | 10-28-2010 |
Pei-Ching Chang, Jhubei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100330632 | Cis-aconitate Decarboxylase Mutants Having Improved Enzymatic Activity - Cis-aconitate decarboxylase mutants having one or more mutations in a C-terminal region as compared with a wild-type cis-aconitate decarboxylase of | 12-30-2010 |
Shang-Wen Chang, Jhubei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090053899 | METHOD OF PATTERN FORMATION IN SEMICONDUCTOR FABRICATION - Provided is a method of fabricating a semiconductor device. The method includes providing a substrate, forming a photo acid generator (PAG) layer on the substrate, exposing the PAG layer to radiation, and forming a photoresist layer on the exposed PAG layer. The exposed PAG layer generates an acid. The acid decomposes a portion of the formed photoresist layer. In one embodiment, the PAG layer includes organic BARC. The decomposed portion of the photoresist layer may be used as a masking element. | 02-26-2009 |
| 20100109054 | PATTERN FORMATION IN SEMICONDUCTOR FABRICATION - Provided is a semiconductor device. The device includes a substrate having a photo acid generator (PAG) layer on the substrate. The PAG layer is exposed to radiation. A photoresist layer is formed on the exposed PAG layer. The exposed PAG layer generates an acid. The acid decomposes a portion of the formed photoresist layer. In one embodiment, the PAG layer includes organic BARC. The decomposed portion of the photoresist layer may be used as a masking element. | 05-06-2010 |
Shao-Chang Chang, Jhubei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090295491 | Carrier Generator - A carrier generator for generating a carrier at a frequency of interest in a wireless communications system comprises an oscillator exhibiting a first impedance, the oscillator comprising an energy storage tank configured to generate a periodic signal, the energy storage tank including at least one inductor and at least one capacitor, and an amplifier coupled with the energy storage tank, the amplifier being configured to amplify an amplitude of the periodic signal, an antenna exhibiting a second impedance smaller than the first impedance, and a network coupled between the oscillator and the antenna, the network including at least one inductor or at least one capacitor and being configured to provide a third impedance such that a resultant impedance of the second impedance and the third impedance as viewed from the oscillator toward the antenna is large enough to facilitate the oscillator to generate the carrier at the frequency of interest. | 12-03-2009 |
Wen Chia Chang, Jhubei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080317459 | Electrical Aperture and Shutter Device having a transparence Switching Element - An electrical aperture and shutter device having a transparence switching element includes an operating element, a transparence switching element, and a controller. The operating element is configured for producing a signal. The transparence switching element is configured for controlling a transparence and a light-passing time of the transparence switching element and thereby carrying out the functions of aperture and shutter. The controller is configured for controlling an operation of the transparence switching element by receiving the signal produced by the operating element. A camera incorporated an electrical aperture and shutter device having a transparence switching element therein, also is provided. | 12-25-2008 |
Yun-Shen Chang, Jhubei City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090238315 | SIGNAL PROCESSING DEVICE AND SIGNAL PROCESSING METHOD - The present invention discloses a signal processing device and a signal processing method. The signal processing device includes a plurality of receiving devices, a storage module, a weighting module, and a processing module. Each of the receiving devices is capable of receiving an original signal stream, thus the plurality of receiving devices can generate a set of signal streams. The storage module is used for storing a plurality set of signal streams generated by the plurality of receiving devices. The weighting module can generate plurality sets of rotated signal streams according to a reference phase and the plurality sets of signal streams, and further generate a set of weighting signal according to the rotated signal streams. And, the processing module can generate a set of weighting signal streams according to the set of weighting signal and the plurality set of signal streams. | 09-24-2009 |