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Chang, Hsinchu Hsien
Chia Jung Chang, Hsinchu Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20110285377 | Data Transmission Interface and Electronic Device Using the Same - A data transmission interface, for coupling to an external apparatus, including a first signal transmission line and a second signal transmission line, for transmitting a differential signal, a first resistor and a voltage-variable component, selectively connected to the first signal transmission line, and a second resistor, connected to the second signal transmission line, wherein, when the data transmission interface is coupled to the external apparatus, the voltage-variable component is connected to the first signal transmission line, and the first signal transmission line presents a first voltage in response to the external apparatus. | 11-24-2011 |
Chih Kun Chang, Hsinchu Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20090262938 | METHOD FOR ENCRYPTING AND DECRYPTING WIRELESS SIGNALS AND APPARATUS THEREOF - An apparatus for encrypting wireless signals comprises an encryption engine, a transmit packet buffer and a transmit control logic. The encryption engine encrypts the wireless signals. The transmit packet buffer stores the encrypted wireless signals. The transmit control logic forwards the encrypted wireless signal from the transmit packet buffer to a wireless channel. | 10-22-2009 |
Chih-Tien Chang, Hsinchu Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20100188067 | Current Calibration Method and Associated Circuit - A current calibration method and the associated control circuit are provided. The method includes: providing a predetermined voltage to the differential output for obtaining an accurate current passing through the panel resistor during a calibration procedure and, providing a driving current to the differential output according to the accurate current during a normal operation procedure. | 07-29-2010 |
| 20110051009 | Apparatus for Auto Phase Detection for Video Signal and Method Thereof - An auto phase detection apparatus for automatically detecting a target sampling phase is provided. The auto phase detection apparatus includes a phase decider for generating a plurality of phase control signals; a sample clock generator, coupled to the phase decider, for generating a plurality of sample clock signals according to the phase control signals; an analog-to-digital converter (ADC), coupled to the sample clock generator, for converting an analog video signal to a digital signal according to the sample clock signals; a phase detector, coupled to the ADC and the phase decider, for generating a plurality of phase detection results according to the digital signal; and a motion detector, coupled to the ADC and the phase decider, for generating a motion detection result by detecting a motion in the digital signal. The phase decider determines the target sampling phase from the phase control signals according to the phase detection results and the motion detection result. | 03-03-2011 |
| 20110157374 | Circuit for Calibrating Sync-on-Green Signal and Associated Method - A circuit for calibrating a sync-on-green (SOG) signal includes a switching device for controlling whether to output an image signal; a reference voltage generator for providing a clamp reference voltage and a comparison reference voltage; a clamp circuit for receiving the clamp reference voltage to generate a clamp output; and a comparing device for comparing the reference voltage with the clamp output to generate the SOG signal. | 06-30-2011 |
| 20110187567 | Phase Digitizing Apparatus and Method Thereof - A phase digitizing apparatus for generating a corresponding digital value in response to a phase of an input signal is provided. The phase digitizing apparatus includes a coarse phase generator, for generating a coarse phase code according to the phase of the input signal and a first time unit; a fine phase code generator, for generating a fine phase code according to the phase of the input signal and a second time unit; and a calculating unit, for generating the digital value according to the coarse phase code and the fine phase code; wherein the first time unit is greater than the second time unit. | 08-04-2011 |
| 20110188600 | Sequence Transition Point Determining Method and Apparatus Thereof - A determining method and apparatus thereof for a transition point of a sequence which can be applied to a decoder. The determining method determines the transition point of the sequence having N numbers, wherein the sequence is composed of a first value and a second value and N is a positive integer. The determining method includes determining the position the first value appearing consecutively in the sequence to determine a first interval; determining the position the second value appearing consecutively in the sequence to determine a second interval; and determining the longer interval between the first interval and the second interval, when the first interval is longer, determining an adjacency of the first interval and the second value as the transition point according to the first interval, and when the second interval is longer, determining an adjacency of the second interval and the first value as the transition point. | 08-04-2011 |
Chih Yen Chang, Hsinchu Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20090278667 | Method and Computer Program Product for Loading and Executing Program Code at Micro-processor - A method and apparatus for loading and executing program code at a micro-processor are disclosed. In this method, a monitoring procedure is performed to monitor whether the micro-processor receives a loading request corresponding to a target program code. If the loading request is received, the target program code is loaded from an external memory into an internal memory of the micro-processor. The micro-processor is then rebooted to enter a first mode in which the target program code in the internal memory is to be executed. | 11-12-2009 |
| 20100052696 | Chip Testing Apparatus and Testing Method Thereof - A chip testing apparatus and a chip testing method are provided. The chip testing apparatus includes a command generating module, a transceiving module and a control module. When the command generating module generates a first test command, the transceiving module transmits the first test command to a radio frequency identification (RFID) chip and receives a target test result from the RFID chip. The control module determines whether the target test result complies with a reference test result. When the determination result of the control module is no, the control module controls the command generating module to generate a second test command for retesting the RFID chip. | 03-04-2010 |
| 20100079257 | Item Positioning System and Method Thereof - An item positioning system is provided. The item positioning system comprises a plurality of tag readers and a control device. The plurality of tag readers generate access signals respectively and receive a response signal from a target tag. The control device adjusts transmitting power of the access signals of the tag readers, and determines a position of the target item according to whether the tag readers receive the response signal. | 04-01-2010 |
| 20100088709 | Transmission Method and Circuit Device Capable of Automatic Transmission Interface Selection - A circuit device capable of automatic transmission interface selection and associated method are provided. The circuit device includes a first interface port, a second interface port, a first interface driver module, a second interface driver module, and a buffer module. A first interface driver module receives a first interrupt packet, converts the first interrupt packet into a first command packet, and stores the first command packet into the buffer module. A second interface driver module receives a second interrupt packet, converts the second interrupt packet into a second command packet, and stores the second command package into the buffer module. The format of the first interrupt packet is different from that of the second interrupt packet, while the first and the second command packets comply with a common format. | 04-08-2010 |
| 20100102928 | Monitoring Apparatus and Operating Method Thereof - A monitoring apparatus and the associated method are provided. The monitoring apparatus includes a tag reading module and a control module. The tag reading module accesses a target tag attached to a target object to generate an access signal. The control module is coupled to the tag reading module and receives the access signal. When the control module operates in an alert mode, the control module selectively generates a control signal according to a reading condition of the access signal. | 04-29-2010 |
Chiung Hung Chang, Hsinchu Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20090303123 | Hybrid GPS Receiving Method and Associated Apparatus - A hybrid Global Positioning System (GPS) receiving method, and associated GPS receiving apparatus is provided. The GPS receiving apparatus includes an RF front-end circuit, a correlation circuit, an acquisition engine and a bidirectional interface control unit. The RF front-end receiving circuit receives a satellite signal and converts the same into a baseband signal. The acquisition engine, coupled to the correlation circuit, determines reception power of the GPS satellite signal. The interface control unit, coupled to the acquisition engine, provides a low-speed interface for transmitting GPS intermediate data that includes a code bin, a frequency bin, navigation data, a local system time and a GPS time. The interface control unit includes a memory interface unit for coupling to a memory. | 12-10-2009 |
| 20100045492 | Decoding Apparatus and Method - A decoding apparatus is disclosed. The decoding apparatus is applied to a data signal comprising a plurality of bits. A plurality of sampled data is generated by sampling the data signal. Each of the bits has a same cycle. The decoding apparatus comprises a calculating module and a determining module. When the calculating module sets a first interval and a second interval in the cycle of a specific bit, the calculating module generates a first count according to the sampled data in the first interval corresponding to a first logic level and generates a second count according to the sampled data in the second interval corresponding to a second logic level. The determining module determines a digital logic value of the specific bit. | 02-25-2010 |
| 20100171599 | METHOD FOR SEARCHING A PLURALITY OF RFID TAGS AND APPARATUS THEREOF - A method for searching RFID tags and an RFID reader thereof are provided. Each of a plurality of RFID tags awaiting to be accessed has a UID composed of a plurality of bits. The method comprises dividing the plurality of bits of the UID into groups to generate a plurality of groups; selecting a first group and a first value for the first group; obtaining a search result according to a search command and the UIDs of the RFID tags; and analyzing the search result to determine whether at least one RFID tag corresponds to the first group and the first value. Each of the groups has n bits, where n is a positive integer greater than or equal to 1. | 07-08-2010 |
| 20100246428 | Method and Apparatus for Performing Data Access According to Protocol Handling - A method for performing data access via software according to communication protocol handling includes: calculating a time slot period and an upper limit of a processing time for performing a predetermined data processing according to time slot information defined in a communication protocol, a critical period and a time slot number; defining a clock frequency of a processor according to the upper limit of the processing time; and performing data access according to the slot time by the processor operating at the clock frequency. Accordingly, design inflexibility arising from performing data access via hardware is addressed, and a non-real-time issue caused by performing data access via software is also prevented. | 09-30-2010 |
Chuan-Chung Chang, Hsinchu Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20090021696 | DEVICE FOR MEASURING AND CORRECTING ABERRATION OF AN EYE - A device and method for measuring and correcting eye aberrations integrate wavefront sensing, wavefront aberration correction and optometric testing into one another and configure the optical paths of wavefront sensing and optometric testing as aplanatic structures, such that under optometric testing conditions both wavefront sensing and aberration correction can be performed simultaneously, and final optometric testing is conducted on wavefront aberration-corrected optometric parameters to verify if the wavefront aberration-corrected optometric parameters fall within normal visual range, thus ensuring the accuracy and high repetition of the measured optometric parameters. | 01-22-2009 |
En-Wei Chang, Hsinchu Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20090206172 | MICRO-SPRAY SYSTEM RESONANCE FREQUENCY MODULATION METHOD AND DEVICE - A micro-spray system resonance frequency modulation method and device designed to minimize resonance frequency drift during atomization involves using a resonance frequency modulation unit for modulating resonance frequency and nodes, controlling and calibrating resonance frequency, and performing real-time measurement and correction to prevent operating frequency from drifting beyond a preferred operating frequency range, with a view to increasing spray flow and spray area, minimizing effects of ambient factors, and overcoming drawbacks of prior art. | 08-20-2009 |
Hsu-Hung Chang, Hsinchu Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20110102090 | Phase Locked Loop and Method Thereof - A phase locked loop (PLL) includes a clock generating circuit, a first phase detecting circuit, a first loop filter, a first VCO, a first mixer and a control circuit. The clock generating circuit generates a first clock signal. The first phase detecting circuit detects a phase difference between an input data signal and a feedback signal and generates a detection output signal according to the phase difference. The first loop filter, coupled to the first phase detecting circuit, generates a first VCO control signal according to the detection output signal. The first mixer, coupled to the first VCO and the clock generating circuit, mixes the output data signal and the first clock signal to generate the feedback data signal. The control circuit, coupled to the clock generating circuit and the first loop filter, for adjusting the first clock signal according to the first VCO control signal to calculate a gain of the first VCO. | 05-05-2011 |
| 20110116586 | Transmitting Apparatus Operative at a Plurality of Different Bands and Associated Method - A transmitting apparatus operative at a plurality of different bands includes at least a modulator, an intermediate frequency (IF) filter, and an offset phase-locked-loop (OPLL). Regardless at which one of the frequency bands the transmitting apparatus operates, a divisor of at least one frequency divider included within the OPLL is fixed, and a signal, which is outputted by a controllable oscillator and received by an offset mixer included within the OPLL, corresponds to a substantially fixed frequency. | 05-19-2011 |
Jen-Tang Chang, Hsinchu Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20110102411 | Low-Power Display Control Method and Associated Display Controller - A low-power display control method and associated display controller is provided. The low-power display control method detects a sensing signal to generate a sensing result. A control signal is generated according to the sensing result to control a power conversion controller to operate in a low-power power saving mode. In response to a wake-up event, the control signal is deasserted and an associated auxiliary circuit is also turned off, and then the display controller is woken up to restore to a normal operating mode. | 05-05-2011 |
Jui-Hsiang Chang, Hsinchu Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20100105433 | Apparatus and Method for Controlling Subscriber Identity Module Card - A Subscriber Identity Module (SIM) card control apparatus applied to a mobile communication device is provided. The mobile communication device has a first SIM card and a second SIM card. The SIM card control apparatus includes a judgment unit, a SIM card controller and a switch device. The judgment unit is used to generate a selection signal according to a to-be-accessed SIM card among the first and the second SIM cards. The SIM card controller transmits signals via a group of signal lines. The switch device is used to selectively connect the group of signal lines to the first SIM card or the second SIM card according to the selection signal. | 04-29-2010 |
Jung-Kuei Chang, Hsinchu Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20090182555 | Speech Enhancement Device and Method for the Same - A speech enhancement device and a method for the same are included. The device includes a down-converter, a speech enhancement processor, and an up-converter. The method includes steps of down-converting audio signals to generate down-converted audio signals; performing speech enhancement on the down-converted audio signals to generate speech-enhanced audio signals; and up-converting the speech enhancement audio signals to generate up-converted audio signals. | 07-16-2009 |
| 20090274322 | Volume Control Apparatus and Method - A volume control apparatus and method is provided. The volume control apparatus includes an automatic gain controller and an equal loudness controller. The method includes steps of receiving an original sound signal by the automatic gain controller, adjusting the original sound signal by the automatic gain controller according to a target volume to output an auto-gain sound signal that gradually converges to the target volume, and rendering a loudness curve according to the target volume for compensating the auto-gain sound signal to output a compensated sound signal. | 11-05-2009 |
| 20110227629 | Dynamic Element Matching Method and System Thereof - A dynamic element matching method and system thereof is provided. The method includes grouping a plurality of switches into a plurality of groups; allocating a plurality of to-be-turned-on switches of the switches for an input signal to the groups; and maintaining a switch activity of each of the groups at a predetermined value. Accordingly, mismatch noise and harmonic noise are effectively reduced. | 09-22-2011 |
Ming-Chung Chang, Hsinchu Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20100032824 | IC Package Method Capable of Decreasing IR Drop and Associated IC Apparatus - An IC package method capable of decreasing IR drop of a chip and associated IC apparatus is provided. The IC package method comprises forming a lead frame including a die paddle and a plurality of fingers; installing a die on the die paddle, and coupling a plurality of signal terminals of the die to the fingers; forming a power transferring unit coupled to a power supply; coupling power reception terminals of a plurality of logic units in the die to the power transferring unit; and forming a housing for encapsulating the die, the lead frame and the power transferring unit. | 02-11-2010 |
Tso-Chi Chang, Hsinchu Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20090311819 | Method for Making Micro-Electromechanical System Devices - A method for making micro-electromechanical system devices includes: (a) forming a sacrificial layer on a device wafer; (b) forming a plurality of loop-shaped through-holes in the sacrificial layer so as to form the sacrificial layer into a plurality of enclosed portions; (c) forming a plurality of cover caps on the sacrificial layer such that the cover caps respectively enclose the enclosed portions of the sacrificial layer; (d) forming a device through-hole in each of active units of the device wafer so as to form an active part suspended in each of the active units; and (e) removing the enclosed portions of the sacrificial layer through the device through-holes in the active units of the device wafer. | 12-17-2009 |
Wu-Chang Chang, Hsinchu Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20080246536 | Two-phase charge pump circuit without body effect - A two-phase charge pump circuit without the body effect includes a voltage boost stage, an input stage connected to the voltage boost stage, and a high-voltage generator connected to the input stage. Each of the circuits can consist of NMOS or PMOS transistors. The body of each NMOS transistor is connected to an NMOS switch. The body of each PMOS transistor is connected to a PMOS switch. By providing an appropriate driving signal to each NMOS or PMOS switch, the body of each NMOS transistor can be switched to a lower voltage level and the body of each PMOS transistor is switched to a higher voltage level. This can prevent the body effect from occurring. | 10-09-2008 |
| 20080309399 | Two-phase charge pump circuit without body effect - A two-phase charge pump circuit without the body effect includes a voltage boost stage, an input stage connected to the voltage boost stage, and a high-voltage generator connected to the input stage. Each of the circuits can consist of NMOS or PMOS transistors. The body of each NMOS transistor is connected to an NMOS switch. The body of each PMOS transistor is connected to a PMOS switch. By providing an appropriate driving signal to each NMOS or PMOS switch, the body of each NMOS transistor can be switched to a lower voltage level and the body of each PMOS transistor is switched to a higher voltage level. This can prevent the body effect from occurring. | 12-18-2008 |
Ya-Mei Chang, Hsinchu Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20110057620 | CHARGE/DISCHARGE PROTECTION CIRCUIT AND DISCHARGING PROTECTION METHOD - A charge/discharge protection circuit adapted in an electronic apparatus and a discharge protection method are provided. The charge/discharge protection circuit comprises a positive electrode, a ground for discharging, a switch module, a battery module, a negative electrode for charging, a sensing device and a control module. The battery module is electrically connected to the switch module and the ground to form a discharging path. The switch module is electrically connected to the positive electrode. The sensing device is electrically connected to the battery module and the negative electrode to form a charging path. The sensing device passively disconnects the charging path when the charging path is abnormal. The control module actively turns the switch open when the discharging path, the charging path or the battery module is abnormal. | 03-10-2011 |
Yi-An Chang, Hsinchu Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20090250101 | Photovoltaic structure - A photovoltaic structure is provided with an added layer inserted between an emitter layer and a window layer. The added layer includes all elements which are same or different both in the emitter layer and the window layer. The addition of the added layer enhances converted current and voltage that improves the conversion efficiency when the structure is applied to a solar cell. | 10-08-2009 |
| 20100122727 | Method for fabricating III-V compound semiconductor solar cell and structure thereof - A method for fabricating a III-V compound semiconductor solar cell includes forming a window layer made of III-V compound material over a top surface of an solar cell structure; forming a periodic array of hole textures of the window layer by using a lithography and etching process; and depositing an anti-reflection coating film to cover the window layer. A III-V compound solar cell structure is also provided to enhance the conversion efficiency of photovoltaic. | 05-20-2010 |
Yu-Chung Chang, Hsinchu Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20080226176 | IMAGE DISPLAYING METHODS AND SYSTEMS - A reading/writing method for displaying an input image. M data sets of the input image are written into a first memory buffer at a first line scanning path. The M data sets are then read from the first memory buffer at a zig-zag scanning path to serve as a read-out sequence of data sets. The read-out sequence of data sets is written into to a second memory buffer at the zig-zag scanning path. The read-out sequence of data sets is read from the second memory buffer at a second line scanning path to display the input image in a rotating form. | 09-18-2008 |
Yung-Fang Chang, Hsinchu Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20110205170 | ELECTRONIC TOUCH - SCREEN DISPLAY APPARATUS AND OPERATING METHOD THEREOF - A control unit of an electronic touch display apparatus, comprising: a touch signal receiving module for receiving a touch signal; a recognition module, coupled to the touch signal receiving module, for recognizing an indicated page number from the control signal; and a data processing module, coupled to the recognition module, for accessing data corresponding to the page number from a database; wherein the data are displayed on a screen of the electronic touch display apparatus, and the indicated page number may be non-adjacent to a page number corresponding to the current displayed page. | 08-25-2011 |
Yu Tai Chang, Hsinchu Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20090262018 | High Accuracy Satellite Receiving Controller and Associated Method - A high accuracy satellite signal receiving controller and associated method is provided. The high accuracy satellite signal receiving controller includes a frequency synthesizer, and an analog-to-digital converter (ADC), a Global Positioning System (GPS) receiving module and a control unit. The frequency synthesizer, coupled to an external non-temperature-compensated crystal oscillator (non-TXCO), generates an oscillating frequency signal to the GPS receiving module. The ADC converts an analog temperature signal into a digital temperature signal. The control unit, coupled to the ADC, adaptively updates temperature/frequency offset data. | 10-22-2009 |
Zhi-Ren Chang, Hsinchu Hsien TW
| Patent application number | Description | Published |
|---|---|---|
| 20100165191 | De-Interlacing Method and Controller Thereof - A de-interlacing method and controller is provided. The de-interlacing method includes steps of de-interlacing based on an i | 07-01-2010 |
| 20110158432 | Audio Volume Control Circuit and Method Thereof - An audio volume control circuit includes a signal intensity calculating circuit for generating a first signal intensity value corresponding to a signal intensity corresponding to an audio channel data; a low-pass filter for filtering the first signal intensity to generate a second signal intensity value; an averaging unit for averaging the second signal intensity value and previous M−1 second signal intensity values to obtain a third signal intensity value, with M being a natural number greater than 1; a gain calculating circuit for obtaining an original gain value according to the third signal intensity value with reference to the adjustment condition; a buffer for temporarily storing the audio channel data; and an audio volume adjusting circuit for generating an adjustment gain value according to the original gain value to adjust the audio channel data stored in the buffer. | 06-30-2011 |