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Chang, Daya Township

Chao-Tsung Chang, Daya Township TW

Patent application numberDescriptionPublished
20100296325Power Converting Device - A power converting device converts a DC voltage input from an external power source into an AC voltage output across an output capacitor of an output circuit, and includes a coupling circuit having series first and second windings. A rectifying diode has a grounded anode coupled to an anode of a clamp diode, and a cathode coupled to the second winding. A cathode of the clamp diode is coupled to a clamp switch and the first winding. A full-bridge circuit includes a first series connection of first and second switches, and a second series connection of third and fourth switches. The first and second series connections are coupled in parallel between the first winding and ground. The output capacitor is coupled between a first common node between the first and second switches, and a second common node between the third and fourth switches.11-25-2010
20110141785DC-TO-AC POWER CONVERTING DEVICE - A power converting device is adapted for converting a DC voltage input from an external power source into an AC voltage output. The power converting device includes: a transformer having first and second windings each having opposite first and second ends; a clamp unit coupled to the external power source, and including a first switch coupled between a reference node and the second end of the first winding, and a series connection of a clamp capacitor and a second switch coupled across the first winding; and an inverting unit coupled to the first end of the second winding, and operable so as to output the AC voltage output based on an induced voltage across the second winding.06-16-2011

Chin-Hsiun Chang, Daya Township TW

Patent application numberDescriptionPublished
20090078734COUNTERFORCE-COUNTERACTING DEVICE FOR A NAILER - A counterforce-counteracting device for a nailer comprises an active device, a rotating member, and a weight device. The active device drives the rotating member and the weight device to move. After the active device moves, the weight device is driven by the rotating member to produce a counterforce, so as to counteract the counterforce of the nailer. Thereby, such a device is secure and is easy to assemble.03-26-2009

Shu Ken Chang, Daya Township TW

Patent application numberDescriptionPublished
20110179562AUXILIARY TANK FOR A FLUSH TOILET - An auxiliary tank for the flush toilet, wherein the one end of the pulling line is connected with a floating ball of the auxiliary tank, then the line is wound from a lower pulley to an upper pulley, and passed through a penetrated hole of a hollow tube, finally the other end of the line is connected with a extension arm in a main tank. When the water level in the main tank is full, the extension arm of the water refilling pipe will be hold by the pulling line which is connected with the floating ball, to limit the refilling water into the main tank from the water refilling pipe but from the auxiliary tank. In the light of above, the flush of the toilet is still able to be operated even at the time of water outage or shutting off the water valve. In addition, the water that refills into the auxiliary tank is the recycling water.07-28-2011

Yuan-Hsiao Chang, Daya Township TW

Patent application numberDescriptionPublished
20080217634VERTICAL LIGHT-EMITTING DIODE STRUCTURE WITH OMNI-DIRECTIONAL REFLECTOR - A vertical light-emitting diode (VLED) structure with an omni-directional reflector (ODR) that may offer increased light extraction and greater luminous efficiency when compared to conventional VLEDs is provided.09-11-2008
20080308829VERTICAL LED WITH CURRENT GUIDING STRUCTURE - Techniques for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a metal alloy substrate) may be provided. For some embodiments, both a current guiding structure and second current path may be provided.12-18-2008
20100258834VERTICAL LED WITH CURRENT GUIDING STRUCTURE - Techniques for controlling current flow in semiconductor devices, such as LEDs are provided. For some embodiments, a current guiding structure may be provided including adjacent high and low contact areas. For some embodiments, a second current path (in addition to a current path between an n-contact pad and a metal alloy substrate) may be provided. For some embodiments, both a current guiding structure and second current path may be provided.10-14-2010

Yu-Hao Chang, Daya Township TW

Patent application numberDescriptionPublished
20100165942Synchronization channel for advanced wireless OFDM/OFDMA systems - A hierarchical downlink (DL) synchronization channel (SCH) is provided for wireless OFDM/OFDMA systems. The SCH includes a Primary SCH (P-SCH) for carrying PA-Preambles used for coarse timing and frequency synchronization, and a Secondary SCH (S-SCH) for carrying SA-Preambles used for cell ID detection. The total time length occupied by P-SCH and S-SCH is equal to one OFDM symbol time length of a data channel, and S-SCH is located in front of P-SCH in each DL frame. A perfect multi-period time-domain structure is created and maintained in P-SCH to increase preciseness of frame boundary estimation. With overlapping deployment of macrocells and femtocells, a predefined SCH configuration scheme is provided to separate frequency subbands used for macrocells and femtocells such that interferences in S-SCH can be mitigated. In addition, a self-organized SCH configuration scheme is provided to allow more flexibility for femtocells to avoid or introduce interference in S-SCH.07-01-2010
20100169722Channel interleaver having a constellation-based unit-wise permuation module - A channel interleaver comprises a novel constellation-based permutation module. The channel interleaver first receives a plurality of sets of encoded bits generated from an FEC encoder. The encoded bits are distributed into multiple subblocks and each subblock comprises a plurality of adjacent bits. A subblock interleaver interleaves each subblock and outputs a plurality of interleaved bits. The constellation-based permutation module rearranges the interleaved bits and outputs a plurality of rearranged bits. The rearranged bits are supplied to a symbol mapper such that a plurality of consecutively encoded bits in the same set of the encoded bits generated from the FEC encoder is prevented to be mapped onto the same level of bit reliability of a modulation symbol. In addition, the plurality of adjacent bits of each subblock is also prevented to be mapped onto the same level of bit reliability to achieve constellation diversity and to improve decoding performance.07-01-2010
20100169738Channel interleaver having a constellation-based block-wise permuation module - A channel interleaver comprises a novel constellation-based permutation module. The channel interleaver first receives a plurality of sets of encoded bits generated from an FEC encoder. The encoded bits are distributed into multiple subblocks and each subblock comprises a plurality of adjacent bits. A subblock interleaver interleaves each subblock and outputs a plurality of interleaved bits. The constellation-based permutation module rearranges the interleaved bits and outputs a plurality of rearranged bits. The rearranged bits are supplied to a symbol mapper such that a plurality of consecutively encoded bits in the same set of the encoded bits generated from the FEC encoder is prevented to be mapped onto the same level of bit reliability of a modulation symbol. In addition, the plurality of adjacent bits of each subblock is also prevented to be mapped onto the same level of bit reliability to achieve constellation diversity and to improve decoding performance.07-01-2010
20100246508Low latency synchronization scheme for wireless OFDMA systems - In advanced wireless OFDMA communication systems, hierarchical synchronization is adopted to synchronize between a base station (BS) and a mobile station (MS). In a hierarchical synchronization architecture, primary advanced preamble (PA-Preamble) is used for coarse time domain synchronization while cell ID is detected using several accumulated secondary advanced preambles (SA-Preambles). Network entry latency can be reduced by adjusting the relative location of superframe header (SFH), PA-Preamble and SA-Preambles within a superframe. Three different synchronization channel (SCH) architectures are proposed to provide different tradeoffs between network entry latency and the robustness of SA-Preamble design and cell ID detection.09-30-2010
20110007690Preamble partition and cell identification procedure in wireless communication systems - Two preamble partition schemes are provided for flexible network deployment and efficient utilization of limited cell identification resources in a wireless network. In a soft partition scheme, the entire preamble sequences are partitioned into several configurable non-overlapping subsets, and each subset is associated with a corresponding cell type. In a hybrid partition scheme, a combination of fixed and configurable subsets is used for preamble partition. The partitioning information is carried in a broadcasting channel broadcasted from base stations to mobile stations. In one embodiment, after a mobile station performs scanning and synchronization with a first base station, it derives the cell type of the first base station from cell identification and partitioning information. The mobile station completes ranging and network entry with the first base station if the cell type is preferred, and starts to perform scanning and synchronization with a second base station if the cell type is non-preferred.01-13-2011