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| 20090055574 | NAND Flash Memory Device And Related Method Thereof - The NAND flash memory device contains a NAND flash memory, a mirror data area, and a controller. The mirror data area has a size at least to hold a page of data and is usually formed by random access memory. The controller saves a data to be written into the NAND flash memory that occupies a partial number of the sectors of a first page of the NAND flash memory into the sectors of a second page of the mirror data area. When a new data is to be written into the remaining sectors of the first page of the NAND flash memory, the new data is stored instead into the second page's remaining sectors of the mirror data area. When the second page of the mirror data area is full, the entire second page is written into the first page of the NAND flash memory. | 02-26-2009 |
| 20090100214 | Management Platform For Extending Lifespan Of Memory In Storage Devices - A management platform for extending lifespan of memory, such as SD, MMC, micro SD, of storage devices is provided. The memory includes a plurality of virtual access units, and a virtual block is defined to include a fixed number of virtual access units. In the management platform, a memory control unit tallies the number of operations performed on a virtual access unit when the virtual access unit is selected to perform on. A processing unit determines whether the data stored in virtual access units should be move to another virtual access unit according to an operation threshold in order to prevent from data loss caused by the memory damage. | 04-16-2009 |
| 20090114722 | Card Reader With Capability Of Adjusting Access Interface Display - A card reader with capability of adjusting the access interface display is provided, including a connection interface for electrically connecting to the host, a plurality of access interfaces for electrically connecting to corresponding memory cards, such as SD, CF, and a controller. When the host completes the enumeration, the controller issues a disconnect signal through the connection interface to the host to erase the original disk mappings, such as G:, F:, on the display for subsequent adjustment. For adjusting the display, the controller issues an optional reconnect signal belonging to the card reader to the host so that the host can execute the re-enumeration and adjust the displaying of the access interface available in the card reader according to the optional reconnect signal. | 05-07-2009 |
| 20090157999 | Control Mechanism For Multi-Functional Chips - A control mechanism for multi-functional chips is provided. By receiving operation signals from the predefined pins of the different operation functions, the present invention accesses the corresponding storage area in the memory module according to the operation signals without using different memory modules and memory controllers corresponding to different operation functions so as to save power and reduce the hardware size. For example, the MegaSIM™ multi-functional chip includes the integration of a plurality of operation functions, such as SD/MMC and ISO 7816. Each operation function uses different communication protocol to provide operation signals through individual to shared predefined pins. For example, MegaSIM™ I/O, Vpp/CLK, GND, CLK RST, and Vcc pins are used by ISO 7816, and Cmd, Data0, and Vpp/CLK pins are used by SD/MMC. | 06-18-2009 |
| 20100122014 | Method For Protecting Memory Proprietary Commands - A method for protecting memory proprietary command is provided. By using the logic block area (LBA) address in the header of the LBA mode, the device end can determine whether the data sector in the LBA mode includes a proprietary command. Also, by using the pre-defined computation function to establish a relation among the values stored in a plurality of characteristic point addresses and a specific point address so that he device end can determine whether a proprietary command is received. As the operating system will not filter out the proprietary command wrapped in this manner, the proprietary command can pass the operating system and be executed by the device end. | 05-13-2010 |
| 20100131808 | Method For Testing Memory - A memory testing method is provided, by using the computation capability of a controller to receive the testing command the program code of a testing PC to generate random data or use an algorithm to generate testing data of specific format. Then, the method writes the data directly to the flash memory and read the data from the memory again to compare with the original data. The comparison result is transmitted back to the testing PC. The method greatly reduces the memory access frequency and I/O load of the testing PC so as to improve the testing efficiency. | 05-27-2010 |
| 20100146221 | Method For Protecting Memory Data - A method for protecting memory data is provided, by extracting bad block addresses stored in the bad block information obtained during the memory scanning testing as memory label, and using an algorithm to compute an identification based on the memory label so that the memory will check the identification and whether the blocks pointed by memory label being bad blocks when an external device request data reading so as to prevent the unauthorized data from being read and achieve the object of protecting memory data. | 06-10-2010 |
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| 20090038924 | AUTOMATIC TIMING SWITCH DEVICE - An automatic timing switch device includes a switch control wheel, a driving assembly, and a plurality of push switches. The switch control wheel includes a plurality of wheel-shaped structures stacked sequentially, wherein each of the wheel-shaped structures has at least one notch formed on an outer periphery of the switch control wheel, and the diameters of the wheel-shaped structures reduce sequentially so that the switch control wheel is in tapered shape. The driving assembly drives the switch control wheel to rotate. The push switches are switched by engaging into or separating from the notches of the wheel-shaped structures as the switch control wheel rotated by the driving assembly. Since the switch control wheel is in a tapered shape, so that the switch control wheel is easily to be formed monolithically and is convenient to be installed to the case of the automatic timing switch device. | 02-12-2009 |
| 20090046540 | AUTOMATIC TIMING CONTROL DEVICE CASE - An automatic timing control device case which is used for accommodating a timing control rotation shaft and a plurality of switches. A motor is disposed on the case for driving a gear set connected to the timing control rotation shaft to rotate, thereby controlling on or off of the switches through the timing control rotation shaft. The automatic timing control device case includes a body and a gear box. The body has an accommodation space for accommodating the timing control rotation shaft and the plurality of switches. The gear box is integrally formed in the body for accommodating the gear set. The gear box has at least one through-hole communicating the gear box and the accommodation space, such that the gear set is connected to and drives the timing control rotation shaft. | 02-19-2009 |
| 20110186412 | TIMER - A timer includes a case, a shaft, a cam wheel, a drive mechanism, and a plurality of switch blades disposed within the case. The shaft is rotatably and reciprocally movably disposed in the case. The cam wheel is pivoted on the shaft and rotates together with the shaft when setting, or rotates independently by the drive mechanism. The cam wheel includes a plurality of cam tracks on one side surface thereof and a plurality of ratchets and grooves on a circular rim thereof. The drive mechanism contacts the ratchets to drive the cam wheel to rotate relative to the shaft. The switch blades respectively contact the cam tracks of the cam wheel, and correspondingly generate an electrical connection/disconnection. When the shaft moves to the setting position and the cam wheel being rotated by the user, a flexible element touches the grooves formed on the circular rim results a tactile feedback. | 08-04-2011 |
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| 20090086142 | LIQUID CRYSTAL DISPLAY PANEL AND ARRAY SUBSTRATE THEREOF - A liquid crystal display panel includes an array substrate, an opposite substrate having an opposite electrode, a liquid crystal layer located therebetween, first alignment patterns and second alignment patterns. The array substrate includes scan lines, data lines and pixel units electrically connecting corresponding scan lines and data lines. Each pixel unit includes a first active device, a first pixel electrode electrically connecting the first active device and a second pixel electrode. The first pixel electrode and the second pixel electrode are separated to define a first displaying region and a second displaying region. The extending directions of the first alignment patterns in the first displaying region and the second alignment patterns in the second displaying region respectively intersect the extending direction of the scan lines at a smaller first acute angle and a greater acute angle for controlling the arrangements of the liquid crystal molecules. | 04-02-2009 |
| 20090086144 | LIQUID CRYSTAL DISPLAY PANEL - A liquid crystal display (LCD) panel including a first substrate, a plurality of scan lines, a plurality of data lines, a plurality of pixel structures, a second substrate, and a liquid crystal layer is provided. The scan lines, data lines, and pixel structures are disposed on the first substrate. The pixel structures are electrically connected to the corresponding scan lines and data lines. The liquid crystal layer is disposed between the first and the second substrates. Each pixel structure includes a first active device, a first pixel electrode electrically connected to the first active device, and a second pixel electrode. A V-shaped main slit formed between the first and the second pixel electrodes has a tip and two branches connected thereto. The tip of the V-shaped main slit directs towards the second pixel electrode. The edges of the first and the second pixel electrodes adjoining each branch are substantially parallel. | 04-02-2009 |
| 20100091232 | LIQUID CRYSTAL DISPLAY PANEL - A liquid crystal display (LCD) panel including a first substrate, a plurality of scan lines, a plurality of data lines, a plurality of pixel structures, a second substrate, and a liquid crystal layer is provided. The scan lines, data lines, and pixel structures are disposed on the first substrate. The pixel structures are electrically connected to the corresponding scan lines and data lines. The liquid crystal layer is disposed between the first and the second substrates. Each pixel structure includes a first active device, a first pixel electrode electrically connected to the first active device, and a second pixel electrode. A V-shaped main slit formed between the first and the second pixel electrodes has a tip and two branches connected thereto. The tip of the V-shaped main slit directs towards the second pixel electrode. The edges of the first and the second pixel electrodes adjoining each branch are substantially parallel. | 04-15-2010 |
