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Chan-Ho Park
Chan-Ho Park, Goyang-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090167338 | TEST PATTERN FOR ANALYZING CAPACITANCE OF INTERCONNECTION LINE - Disclosed is a test pattern for analyzing capacitances of interconnection lines that accounts for parasitic capacitance components. The test pattern includes a first metal line having a comb-type structure including a plurality of tines, a second metal line having a comb-type structure including a plurality of tines engaged with the tines of the first metal line, a first probe pad switchably connected to the first metal line, and a second probe pad switchably connected to the second metal line. Switchable connections between the first metal line and the first probe pad and between the second metal line and the second probe pad may be provided by first and second switch terminals, respectively. The test pattern enables a capacitance measurement that accounts for parasitic capacitance components of pads and portions of interconnection lines leading from the pads, which otherwise interfere with accurate measurement of capacitances of the interconnection lines. | 07-02-2009 |
| 20090168294 | CAPACITOR - A capacitor according to an embodiment can include a first dielectric layer; a first metal layer disposed below the first dielectric layer; a second dielectric layer disposed below the first metal layer; a second metal layer disposed below the second dielectric layer; a third dielectric layer disposed below the second metal layer; and a third metal layer disposed below the third dielectric layer and electrically connected to the first metal layer. | 07-02-2009 |
| 20100163981 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device includes: an active region defined by a device isolation layer on and/or over a substrate; a second conductive well on and/or over the active region; an extended drain formed at one side of the second conductive well; a gate electrode on and/or over the second conductive well and the extended drain; and a source and a drain formed at both sides of the gate electrode, in which extended regions are formed at the corners of the second conductive well under the gate electrode. | 07-01-2010 |
| 20100164532 | APPARATUS AND METHOD FOR MEASURING CHARACTERISTICS OF SEMICONDUCTOR DEVICE - An apparatus and method for measuring the characteristics of a semiconductor device is disclosed. The measuring apparatus may include first to M-th (wherein M is a positive integer not less than 1) starved devices each being biased in response to a bias voltage varying in accordance with a variable first supply voltage, thereby varying an amount of current flowing through a semiconductor device included in the starved device. Interconnect lines may interconnect the first to M-th starved devices. A measuring unit measures at least one of a delay time caused by the semiconductor devices of the starved devices themselves, and a compound delay time caused by the semiconductor devices of the starved devices themselves plus a delay time caused by the interconnect lines. The measured results can be analyzed under conditions more approximate to diverse situations exhibited in practical chips in accordance with development of manufacturing processes and techniques. It is also possible to provide the basis of a model which more effectively represents coupling geometry of more complex semiconductor devices and interconnect lines. The basis of the model may be applied to development of various tools, etc. | 07-01-2010 |
| 20100169058 | MODELING STRUCTURE FOR SIMULATION OF TRAPEZOIDAL METAL LINE - Embodiments relate to a semiconductor technology, and more particularly, to a modeling structure for simulation of a trapezoidal metal line. The modeling structure for simulation of a trapezoidal metal line includes a top step with a width A, a bottom step with a width B, a middle step with a width equal to an average of the width A and the width B, and a total height C, wherein the middle step has a height equal to a value obtainable by subtracting both a height of the top step and a height of the bottom step from the total height C. | 07-01-2010 |
Chan-Ho Park, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090094299 | Apparatus and method for defragmenting files on a hydrid hard disk - An apparatus and method for defragmenting files on a hybrid hard disk are provided. The apparatus includes a nonvolatile memory located within the hybrid hard disk, a loading unit reading data of a fragmented cluster and temporarily storing the read data in the nonvolatile memory, and a writing unit writing the temporarily stored data in contiguous clusters. | 04-09-2009 |
| 20100006031 | GAS DISTRIBUTION PLATE AND SUBSTRATE TREATING APPARATUS INCLUDING THE SAME - A gas distribution plate that is installed in a chamber providing a reaction space and supplies a reaction gas onto a substrate placed on a substrate placing plate, wherein the gas distribution plate includes: first and second surfaces opposing to each other, wherein the second surface faces the substrate placing plate and has a recess shape; and a plurality of injection holes each including: an inflow portion that extends from the first surface toward the second surface; a diffusing portion that extends from the second surface toward the first surface; and an orifice portion between the inflow portion and the diffusing portion, wherein the plurality of inflow portions of the plurality of injection holes decrease in gas path from edge to middle of the gas distribution plate, and wherein the plurality of diffusing portions of the plurality of injection holes have substantially the same gas path. | 01-14-2010 |
Chan-Ho Park, Daejeon KR
| Patent application number | Description | Published |
|---|---|---|
| 20090241001 | RETRANSMISSION AND DELAYED ACK TIMER MANAGEMENT LOGIC FOR TCP PROTOCOL - Provided is an apparatus for detection timeout of each channel, which is a socket connection, in a Transmission Control Protocol (TCP) Offload Engine (TOE) using TCP accelerating hardware, and a method thereof. The timer managing apparatus of the TOE using the TCP accelerating hardware, including: a command register for receiving a command for a retransmission timer or a delayed ACK timer from an embedded processor of the TOE; a finite state machine (FSM) for storing information of a timer in operation by analyzing the command for the retransmission timer or the delayed ACK timer stored in the command register and controlling an entire operation of the timer managing apparatus; and a timeout checker for checking timeout of a timer in operation by using the stored timer information and notifying the timeout to the FSM. | 09-24-2009 |
Chan-Ho Park, Suwon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090087168 | METHOD AND APPARATUS FOR REPRODUCING MEDIA CONTENTS USING NON-VOLATILE STORAGE MEDIUM - The invention relates generally to a method for reproducing digital media content, and more particularly but without limitation, to a method and apparatus for reading a boot code and digital media content from a non-volatile storage medium other than a conventional hard disk drive. In embodiments of the invention, power is limitedly supplied to an apparatus required for reproducing digital media content. Additionally, in embodiments of the invention, the digital media content is reproduced using a non-volatile storage medium other than a conventional hard disk drive (HDD); in particular, embodiments of the invention utilize a solid state drive (SSD) such as a non-volatile cache memory inside a hybrid hard drive (HDD) or an on-board cache memory. Embodiments of the invention also provide an apparatus for performing the method. | 04-02-2009 |
| 20090089501 | METHOD OF PREFETCHING DATA IN HARD DISK DRIVE, RECORDING MEDIUM INCLUDING PROGRAM TO EXECUTE THE METHOD, AND APPARATUS TO PERFORM THE METHOD - A method of prefetching data in a hard disk drive includes searching for a logic block address (LBA) of data requested by an external apparatus in a history of a non-volatile cache of the hard disk drive, and if the LBA of the data is stored in the history, storing data recorded in a LBA stored after the LBA of the data requested by the external apparatus from among LBAs stored in the history in a buffer of the hard disk drive. | 04-02-2009 |
Chan-Ho Park, Incheon KR
| Patent application number | Description | Published |
|---|---|---|
| 20110319456 | BENZOARYLUREIDO COMPOUNDS, AND COMPOSITION FOR PREVENTION OR TREATMENT OF NEURODEGENERATIVE BRAIN DISEASE CONTAINING THE SAME - Novel benzoarylureido compounds and a use thereof for prevention and/or treatment of the neurodegenerative brain disease are provided. The neurodegenerative brain diseases may include Alzheimer's disease, dementia, Parkinson's disease, stroke, amyloidosis, Pick's disease, Lou Gehrig's disease, Huntington's disease, Creutzfeld-Jakob disease, and the like. | 12-29-2011 |
Chan-Ho Park, Yongin-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20120084547 | METHOD AND TERMINAL OF BOOTING A COMPUTING SYSTEM - Provided is a method of booting a computing system which performs boot image transmission and device initialization in parallel. For example, using an Internal RAM and direct memory access (DMA), hardware initialization and loading of boot image from a main storage medium to a main memory are performed in parallel, thereby reducing time spent on booting. | 04-05-2012 |