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Chakravarty
Abhijit Chakravarty, Maharashtra IN
| Patent application number | Description | Published |
|---|---|---|
| 20120101905 | Method and Apparatus for Generating a Multimedia Advertisement - A method and system for generating multimedia advertisement is disclosed. In an embodiment, a method for generating multimedia advertisement is disclosed. The method comprising accessing user selected files, accessing an information file, processing user selected image files or video files using the information file, processing user selected audio files using the information file, and generating a multimedia advertisement file. | 04-26-2012 |
Avik Chakravarty, Essex GB
| Patent application number | Description | Published |
|---|---|---|
| 20090108266 | Friction Control in Apparatus Having Wide Bandgap Semiconductors - Apparatus comprising, in use, a wide bandgap semiconductor, a conductor which is moveable relative to the semiconductor and means for applying a potential across the junction between a conductor and semiconductor to control the friction generated by the relative movement between the semiconductor and the conductor. A method of controlling friction between a wide bandgap semiconductor and conductor which are moveable relative to each other comprising applying a potential across the junction between the semiconductor and the conductor. | 04-30-2009 |
Pradeep Chakravarty, Gujarat IN
| Patent application number | Description | Published |
|---|---|---|
| 20110275722 | PROPOFOL BASED ANESTHETIC WITH PRESERVATIVE - The invention is a sterile pharmaceutical composition for parenteral administration comprised of an oil-in-water emulsion, in which Propofol is dissolved in a water-immiscible lipophilic agents, and surface stabilizing amphiphilic agent, and tonicity modifying water-soluble hydroxy group and preservative preferably, lipophilic organic compound (butylated hydroxytoluene, butylated hydroxyanisole) or its pharmaceutically acceptable salts thereof | 11-10-2011 |
Probir Chakravarty, West Sussex GB
| Patent application number | Description | Published |
|---|---|---|
| 20080260726 | Organic Compounds - A method of identifying a substance suitable for use in inhibiting mucus hypersecretion that modulates the activity of a human cathepsin C gene or its gene product. The method involves combining a candidate substance with the human cathepsin C gene or its gene product and measuring the effect of the candidate substance on the activity of the gene or its gene product. | 10-23-2008 |
Suhas Chakravarty, New Delhi IN
| Patent application number | Description | Published |
|---|---|---|
| 20090251226 | LOCK DETECTION CIRCUIT FOR PHASE LOCKED LOOP - A lock detector circuit for detecting a lock condition between a reference signal and a feedback signal includes a first counter for outputting a first counter value indicative of a number of clock cycles of the reference signal, and a second counter for outputting a second counter value indicative of a number of clock cycles of the feedback signal. An asynchronous comparator receives the first and second counter values and provides an output signal having a pulse width that is proportional to the difference between the first and second counter values. A pulse width detector receives the comparator output signal and produces an output signal that is indicative of the relationship between the pulse width of the comparator output signal and a predetermined threshold value. A state machine controls the state of at least one lock indication signal according to the pulse width detector output signal. | 10-08-2009 |
Sujoy Chakravarty, Bangalore IN
| Patent application number | Description | Published |
|---|---|---|
| 20090140772 | ARCHITECTURE FOR VBUS PULSING IN UDSM PROCESSES - Architecture for VBUS pulsing in an Ultra Deep Sub Micron (UDSM) process for ensuring USB-OTG (On The Go) session request protocol, the architecture being of the type wherein at least a charging circuit is deployed, uses a diode-means connected in a forward path of the charging circuit. The architecture might include a diode-divider including nodes and connected from VBUS in said charging circuit. One embodiment uses both charging and discharging circuits comprising transistors. The charging circuit transistor might comprise a PMOS transistor and the discharging circuit transistor might comprise a NMOS transistor. The architecture might include a three resistance string of a total resistance value approximating 100K Ohms connected between said VBUS and ground, wherein the discharging circuit transistor might comprise a drain extended NMOS transistor. The charging and discharging circuit transistors have VDS and VGD of about 3.6V, whereby high VGS transistors are not needed. | 06-04-2009 |
| 20110254603 | PHASE INTERPOLATOR AND A DELAY CIRCUIT FOR THE PHASE INTERPOLATOR - Phase interpolator and a delay circuit for the phase interpolator. The phase interpolator includes a variable delay circuit to rotate phase of an input clock to generate a phase rotated signal. The phase interpolator also includes a delay locked loop coupled to the variable delay circuit to generate a plurality of phase shifted outputs. The delay locked loop includes a plurality of delay elements. Each delay element includes a multiplexer and a delay cell coupled to the multiplexer. The multiplexer is configurable using a first control signal to output one of the phase rotated signal and a phase shifted output of the plurality of phase shifted outputs. The delay cell delays one of the phase rotated signal and the phase shifted output to generate another phase shifted output of the plurality of phase shifted outputs. | 10-20-2011 |
Sujoy Chinmoy Chakravarty, Bangalore IN
| Patent application number | Description | Published |
|---|---|---|
| 20090302895 | CONSTANT OUTPUT COMMON MODE VOLTAGE OF A PRE-AMPLIFIER CIRCUIT - A method, apparatus and system of constant output common mode voltage of a pre-amplifier circuit are disclosed. In one embodiment, a system includes a first circuit, a comparator circuit coupled with an output of the first circuit, a pre-amplifier circuit of the comparator circuit, a tracking circuit coupled with a common output location of the pre-amplifier circuit to provide (e.g., source/sink) an additional current to the common output location of the pre-amplifier circuit using an alternate current path in the tracking circuit when an input common mode of the pre-amplifier circuit is beyond a saturation range, and a second circuit of the comparator circuit coupled with the pre-amplifier circuit. A scaled version of a pair of input transistors of a pre-amplifier circuit of the tracking circuit may be created using a scaling factor (‘N’). | 12-10-2009 |