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Chai, US
Chiaming Chai, Chapel Hill, NC US
| Patent application number | Description | Published |
|---|---|---|
| 20080315919 | LOGIC STATE CATCHING CIRCUITS - A number of logic state catching circuits are described which use a logic circuit with a first input, a second input, and an output. The logic circuit is configured to respond to a change in state of a data value coupled to the first input causing a representative value of the data value to be generated on the output. The second input receives a latched version of the data value to hold the representative value on the output after the data value has returned to its original state. A latching element is configured to respond to the change in state of the data value by latching the data value and to couple the latched version of the data value to the second input. A reset element is configured to respond to a change in state of a clock input by resetting the latching element. | 12-25-2008 |
| 20090040801 | Content Addressable Memory - A content addressable memory (CAM) is disclosed. The CAM has first and second CAM cells in which each adjacent CAM cell is rotated 180° relative to its neighbor, which provides a compact physical arrangement having overall matched CAM array cell and RAM array cell row heights. Further, an interleaved set scheme can be applied to the CAM cells to provide reduced routing of compare signals and reduced parasitic capacitance. | 02-12-2009 |
| 20100023684 | METHOD AND APPARATUS FOR REDUCING POWER CONSUMPTION IN A CONTENT ADDRESSABLE MEMORY - Power consumption in a Content Addressable Memory (CAM) circuit is reduced by use of a CAM circuit. According to one embodiment of the CAM circuit, the CAM circuit includes a plurality of match lines and match line restoration circuitry. The match line restoration circuitry is configured to prevent at least one of the match lines from being restored to a pre-evaluation state responsive to corresponding enable information. | 01-28-2010 |
| 20100148839 | Self-Tuning Of Signal Path Delay In Circuit Employing Multiple Voltage Domains - Circuits and methods provided in multiple voltage domains that include self-tuning or timing of a signal path are disclosed. A plurality of paths is provided in the circuit. Each path traverses a portion of the multiple voltage domains, which may include any number or combination of the multiple voltage domains. Each of the paths has a delay responsive to at least one of the plurality of voltage domains. A delay circuit is provided and configured to generate a delay output related to the delay in the plurality of paths. In this manner, the delay output of the delay circuit is self-tuned or adjusted according to the delay in the plurality of paths. This self-tuning may be particularly suited to control the delay of a first signal path relative to a second signal path wherein the delay in the paths can vary with respect to each other during operation. | 06-17-2010 |
| 20100182823 | Low Leakage High Performance Static Random Access Memory Cell Using Dual-Technology Transistors - A memory cell includes a storage element, a write circuit coupled to the storage element and a read circuit coupled to the storage element. At least a portion of the storage element and at least a portion of the write circuit are fabricated using a thicker functional gate oxide and at least a portion of the read circuit is fabricated using a thinner functional gate oxide. | 07-22-2010 |
| 20110140752 | Adaptive Clock Generators, Systems, and Methods - Adaptive clock generators, systems, and related methods than can be used to generate a clock signal for a functional circuit to avoid or reduce performance margin are disclosed. In certain embodiments, a clock generator autonomously and adaptively generates a clock signal according to a delay path(s) provided in a delay circuit(s) relating to a selected delay path(s) in the functional circuit(s). The clock generator includes a delay circuit(s) adapted to receive an input signal and delay the input signal by an amount relating to a delay path(s) of a functional circuit(s) to produce an output signal. A feedback circuit is coupled to the delay circuit(s) and responsive to the output signal, wherein the feedback circuit is adapted to generate the input signal back to the delay circuit(s) in an oscillation loop configuration. The input signal can be used to provide a clock signal to the functional circuit(s). | 06-16-2011 |
| 20110211386 | Low Leakage High Performance Static Random Access Memory Cell Using Dual-Technology Transistors - A memory cell includes a storage element, a write circuit coupled to the storage element and a read circuit coupled to the storage element. At least a portion of the storage element and at least a portion of the write circuit are fabricated using a thicker functional gate oxide and at least a portion of the read circuit is fabricated using a thinner functional gate oxide. | 09-01-2011 |
| 20110227639 | Method and Apparatus for Suppressing Bitline Coupling Through Miller Capacitance to a Sense Amplifier Interstitial Node - A sense amplifier circuit is implemented for suppressing Miller effect capacitive coupling. The amplifier circuit comprises a differential amplifier circuit having a first input, a first output interstitial node, a second input, a second output interstitial node, a third input to enable or disable the differential amplifier, and having an equalizer circuit coupled between the first output interstitial node and the second output interstitial node. The amplifier circuit also comprises a cross coupled latch circuit having a first latch input coupled to the first output interstitial node, a second latch input coupled to the second output interstitial node, a first latch output, and a second latch output, wherein during a first time period the first latch output and the second latch output are precharged, the differential amplifier circuit is disabled, and the equalizer circuit is enabled to suppress the Miller effect capacitive coupling on the sense amplifier inputs. | 09-22-2011 |
| 20110249518 | Circuits, Systems, and Methods for Dynamic Voltage Level Shifting - Dynamic voltage level shifting circuits, systems and methods are disclosed. A level shifting circuit comprises an input for accepting a first discrete voltage level to be shifted, a level shifting portion coupled to the input and to a second discrete voltage level, an enable portion having an enable input and coupled to the level shifting portion and an output. The level shifting circuit is configured to translate the data input at the first discrete voltage level into a second discrete voltage level. The enable portion is configured to selectively provide either the second discrete voltage level to the output or decouple at least a portion of the level shifting portion from the output based on the enable input. | 10-13-2011 |
Deping Chai, Collegoville, PA US
| Patent application number | Description | Published |
|---|---|---|
| 20110039895 | PROLYL HYDROXYLASE INHIBITORS - The invention described herein relates to certain benzimidazol-4-ylcarboxamide derivatives of formula (I) | 02-17-2011 |
Deping Chai, Collegeville, PA US
| Patent application number | Description | Published |
|---|---|---|
| 20080214455 | Novel Chemical Compounds - This invention relates to newly identified compounds for inhibiting hYAK3 proteins and methods for treating diseases associated with hYAK3 activity. | 09-04-2008 |
| 20090176825 | PROLYL HYDROXYLASE INHIBITORS - The invention described herein relates to certain bicyclic heteroaromatic N-substituted glycine derivatives of formula (I) | 07-09-2009 |
| 20090203692 | NOVEL CHEMICAL COMPOUNDS - This invention relates to newly identified compounds for inhibiting hYAK3 proteins and methods for treating diseases associated with hYAK3 activity. | 08-13-2009 |
Francis K. Chai, Bend, OR US
| Patent application number | Description | Published |
|---|---|---|
| 20110049532 | SILICON CARBIDE DUAL-MESA STATIC INDUCTION TRANSISTOR - A dual-mesa static induction transistor (SIT) structure includes a silicon carbide substrate having a layer arrangement formed thereon. Laterally spaced ion implanted gate regions are defined in the layer arrangement. Source regions are defined in the layer arrangement. Each of the source regions can include a channel mesa having a source mesa disposed thereon. The source mesa includes sidewalls relative to a principal plane of the substrate defining a horizontal dimension thereof. The channel mesa includes slanted sidewalls relative to the source mesa and the principal plane of the substrate. Also disclosed is a method of fabricating a dual-mesa SiC transistor device. The method includes implanting ions at a normal relative to a principal plane of the substrate to form gate junctions in upper portions of the substrate and lateral portions of the slanted channel mesas. | 03-03-2011 |
Huazhen Chai, Caledonia, IL US
| Patent application number | Description | Published |
|---|---|---|
| 20120026636 | ACTIVE AC INRUSH CURRENT CONTROL - Active inrush current control includes activating a load, the activating causing inrush current to flow, switching a semiconductor switching device to a current limiting state in response to the inrush current flow, the current limiting state being one of at least three states of the semiconductor switching device and the current limiting state dissipating the inrush current, and switching the semiconductor device to a full current flow state in response to the dissipating, the full current flow state not inhibiting current flow. | 02-02-2012 |
| 20120043921 | CONTROL OF POLE-CHANGE INDUCTION MOTORS - A ram air fan control system includes a ram air fan motor, the ram air fan motor being a pole-change induction motor with at least two pole-count configurations, a ram air fan contactor in operative communication with a first pole-count configuration of the ram air fan motor over a ram air fan conductor bus, a ram air fan power controller in operative communication with the ram air fan contactor, a common contactor in operative communication a second pole-count configuration of the ram air fan motor over a common conductor bus, the common conductor bus being separate and electrically isolated from the ram air fan conductor bus, and a common power controller in operative communication with the common contactor. | 02-23-2012 |
Jinan Chai, Evanston, IL US
| Patent application number | Description | Published |
|---|---|---|
| 20100059475 | METHOD OF NANOSCALE PATTERNING USING BLOCK COPOLYMER PHASE SEPARATED NANOSTRUCTURE TEMPLATES - A method of forming nanostructures using block copolymer nanostructure templates is disclosed herein. The method includes forming a nanostructure template by patterning a block copolymer on a substrate and allowing the block copolymer to phase separate to form the nanostructure template. The nanostructure template can then be loaded with a nanostructure precursor material. The nanostructure template is removed to form the nanostructure. | 03-11-2010 |
| 20110165341 | BLOCK COPOLYMER-ASSISTED NANOLITHOGRAPHY - In accordance with an embodiment of the disclosure, a method for forming submicron size nanostructures on a substrate surface includes contacting a substrate with a tip coated with an ink comprising a block copolymer matrix and a nanostructure precursor to form a printed feature comprising the block copolymer matrix and the nanostructure precursor on the substrate, and reducing the nanostructure precursor of the printed feature to form a nanostructure having a diameter (or line width) of less than 1 μm. | 07-07-2011 |
| 20110206905 | METHOD FOR FORMING A BLOCK COPOLYMER PATTERN - A method for forming a block copolymer pattern on a substrate, wherein the areal density of nanostructures in the pattern is increased by increasing the thickness of the block copolymer film that is applied to the substrate. | 08-25-2011 |
Jinghua Chai, Ardmore, PA US
| Patent application number | Description | Published |
|---|---|---|
| 20080249053 | Compositions And Methods For Detecting And Treating Neurological Conditions - The present invention relates to the NIPA-1 proteins and nucleic acids encoding the NIPA-1 proteins. The present invention further provides assays for the detection of NIPA-1 polymorphisms and mutations associated with disease states, as well as methods of screening for ligands and modulators of NIPA-1 proteins. | 10-09-2008 |
Jinxiang Chai, College Station, TX US
| Patent application number | Description | Published |
|---|---|---|
| 20120127164 | PROCESSING APPARATUS AND METHOD FOR CREATING AVATAR - A processing apparatus for creating an avatar is provided. The processing apparatus calculates skeleton sizes of joints of the avatar and local coordinates corresponding to sensors attached to a target user, by minimizing a sum of a difference function and a skeleton prior function, the difference function representing a difference between a forward kinematics function regarding the joints with respect to reference poses of the target user and positions of the sensors, and the skeleton prior function based on statistics of skeleton sizes with respect to reference poses of a plurality of users. | 05-24-2012 |
Liang Chai, Stuart, FL US
| Patent application number | Description | Published |
|---|---|---|
| 20100156196 | ELECTRICALLY CONDUCTIVE ELEMENT, SYSTEM, AND METHOD OF MANUFACTURING - An electrically conductive element, including an insulator and a first conductor, is provided, which can be affixed to a second conductor consisting of conductive structural element, wherein the insulator is positioned between the first and second conductors to electrically isolate them. A power supply may be connected between the first and second conductors to provide power thereto, and an electrical device may be connected across the first and second conductors. | 06-24-2010 |
| 20100170616 | ELECTRICALLY CONDUCTIVE TAPE FOR WALLS AND CEILINGS - An electrically conductive tape for walls and ceilings is provided. The tape includes a substrate configured to be applied to at least one surface including at least one surface of a wall or ceiling and at least one conductive layer applied to the substrate. The conductive layer is penetrable by at least a conductor of an electrical device to provide an electrical connection thereto. In one embodiment the conductive layer is formed from a conductive composition including an electrically conductive material therein. The conductive composition can include a conductive ink. A method of manufacturing an electrically conductive tape or film for walls and ceilings is also provided. The method includes providing a conductive composition including an electrically conductive material therein, and providing a substrate configured to be applied to at least one surface including at least one surface of a wall or ceiling. The method also includes applying the conductive composition to the substrate forming a conductive layer attached to the substrate, the conductive layer being penetrable by a conductor of an electrical device. | 07-08-2010 |
| 20100170702 | ELECTRICALLY CONDUCTIVE MODULE - An electrically conductive module is provided. The module includes a panel configured to engage with one or more conductive structural elements. The module further includes conductive layers formed on or in the panel. Each conductive layer has a terminal configured to be in electrical communication with at least one of the conductive structural elements. In one embodiment of the present invention, a first terminal is configured to be in electrical communication with a first conductive structural element and a second terminal is configured to be in electrical communication with a second conductive structural element. In another embodiment of the present invention, both a first terminal and a second terminal are configured to be in electrical communication with a first conductive structural element. In this embodiment, the first and second terminals are respectively configured to be in electrical communication with first and second conductive portions of the first conductive structural element. | 07-08-2010 |
| 20110310528 | Capacitor with Three-Dimensional High Surface Area Electrode and Methods of Manufacture - A capacitor, and methods of its manufacture, having improved capacitance efficiency which results from increasing the effective area of an electrode surface are disclosed. An improved “three-dimensional” capacitor may be constructed with electrode layers having three-dimensional aspects at the point of interface with a dielectric such that portions of the electrode extend into the dielectric layer. Advantageously, embodiments of a three-dimensional capacitor drastically reduce the space footprint that is required in a circuit to accommodate the capacitor, when compared to current capacitor designs. Increased capacitance density may be realized without using high k (high constant) dielectric materials, additional “electrode-dielectric-electrode” arrangements in an ever increasing stack, or serially stringing together multiple capacitors. | 12-22-2011 |
Min Chin Chai, Lynnwood, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20110316567 | Lattice Structure for Capacitance Sensing Electrodes - One embodiment of a capacitive sensor array may comprise a first plurality of sensor elements and a second sensor element comprising a main trace, where the main trace intersects each of the first plurality of sensor elements to form a plurality of intersections. A unit cell may be associated with each of the intersections, and each unit cell may designate a set of locations nearest to the corresponding intersection. A contiguous section of the main trace may cross at least one of the plurality of unit cells. Within each unit cell, the second sensor element may comprise at least one primary subtrace branching away from the main trace. | 12-29-2011 |
| 20120044198 | SELF SHIELDING CAPACITANCE SENSING PANEL - A self-shielding capacitive sensor array may include a first plurality of sensor elements and a second plurality of sensor elements, where each of the second plurality of sensor elements intersects each of the first plurality of sensor elements, such that each of the first plurality of sensor elements may be capacitively coupled with each of the second plurality of sensor elements. The first plurality of sensor elements may be configured to shield each of the second plurality of sensor elements from a noise source. | 02-23-2012 |
Ming-Li Chai, Woodinville, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20110074739 | LIGHT-TRANSMISSIVE KEY AND OPTICALLY-RECOGNIZABLE SIGNATURE - A machine vision input system includes a light-transmissive key including a base surface and an opposing touch surface. The base surface is configured to optically mate with a display surface so that images displayed on the display surface are viewable through the touch surface. An optically-recognizable signature is registered to the light-transmissive key for detection by an image capture device. The optically-recognizable signature provides machine vision differentiation from other optically-recognizable signatures while transmitting images displayed on the display surface for viewing through the touch surface of the light-transmissive key. | 03-31-2011 |
Mu Chai, Bellevue, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20100281002 | ACTIVE DIRECTORY CONTAINER RECOVERY - Methods and systems for performing rapid recovery of deleted object in Active Directory. The invention allows automated recovery of any object at any point in an Active Directory hierarchy. In one embodiment, the method for recovering a deleted object includes determining whether the object of interest is contained in the tombstone and, if not, recursively evaluating higher-order parent nodes until a parent node is found that exists in the tombstone. The object of interest can then be reanimated and its attributes automatically restored as well as those for all of the children of the object of interest. | 11-04-2010 |
Ning Chai, Philadelphia, PA US
| Patent application number | Description | Published |
|---|---|---|
| 20110257080 | Hepatitis B Virus Compositions and Methods of Use - A polypeptide comprising a preS1 region of hepatitis B virus (HBV), or a fragment thereof, and/or the preS2 region of HBV or a fragment thereof, and methods of use to inhibit virus infection are disclosed. A lentivirus comprising hepatitis B virus (HBV) envelope proteins, or a fragment thereof, and/or the L envelope protein of HBV and/or the M envelope protein of HBV or a fragment thereof, and/or the S envelope protein of HBV or a fragment thereof, and methods of use of this lentivirus HBV pseudovirus as a gene therapy to target hepatocytes for the administration of therapeutic agents are also disclosed. | 10-20-2011 |
Peter Chai, Highland Heights, OH US
| Patent application number | Description | Published |
|---|---|---|
| 20090018033 | Cell Aggregation and Encapsulation Device and Method - The invention is a cell aggregation device comprising a hydrogel substrate having at least one, preferably a plurality, of cell-repellant compartments recessed into the uppermost surface. Each compartment is composed of an upper cell suspension seeding chamber having an open uppermost portion and a bottom portion, and one, or more than one, lower cell aggregation recess connected to the bottom portion of the upper cell suspension seeding chamber by a port. The diameter of the port may be fully contiguous with the walls of the chambers and walls of the recesses, or the diameter of the port may be more narrow than the walls of the chamber but fully contiguous with the walls of the recesses or more narrow than both the walls of the chamber and the walls of the recesses. The upper cell suspension seeding chambers are formed and positioned to funnel the cells into the lower cell aggregation recesses through gravitational force. The aggregation recesses are formed and positioned to promote cellular aggregation by coalescing cells into a finite region of minimum gravitational energy, increasing intercellular contact and minimizing or preventing cell adherence to the substrate. A device for encapsulating aggregates of live cells is provided. The device comprises (i) a biocompatible, bio-sustainable substrate having a cell-encapsulating face composed of one or more biocompatible, bio-sustainable, spaced-apart, cell-encapsulating compartments extending therefrom and (ii) a coating layer composed of a biocompatible, bio-sustainable polymer that completely surrounds the substrate and the cell-encapsulating compartments. A method for making the device is also provided. | 01-15-2009 |
Sek M. Chai, Streamwood, IL US
| Patent application number | Description | Published |
|---|---|---|
| 20080244152 | Method and Apparatus for Configuring Buffers for Streaming Data Transfer - A specification of a configurable processor is generated by generating (1) specifications of first and second stream memory interfaces to be operable to access data in accordance with first and second stream descriptors, and (2) a specification of an interim data storage device (buffer) to be accessed by the first and second stream memory interfaces and to be operable to receive data from a first computational module via the first stream memory interface and to transfer data to a second computational module via the second stream memory interface. The specifications are output and may be used to configure a configurable processor. | 10-02-2008 |
| 20080244169 | Apparatus for Efficient Streaming Data Access on Reconfigurable Hardware and Method for Automatic Generation Thereof - A content addressable memory (CAM) is disclosed that includes a memory having a first port configured to write a 1-bit data to the memory and a second port configured to read and write N-bit data. To update the CAM, an N-bit zero data word is written to the second port at a first address A | 10-02-2008 |
| 20090297061 | REPLACING IMAGE INFORMATION IN A CAPTURED IMAGE - Described herein are systems and methods for expanding upon the single-distance-based background denotation to seamlessly replace unwanted image information in a captured image derived from an imaging application so as to account for a selected object's spatial orientation to maintain an image of the selected object in the captured image. | 12-03-2009 |
Seung-Yup Chai, Redmond, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20100017798 | Automatic Computer Program Customization Based On A User Information Store - Software programs, such as an operating system or other application programs, are automatically customized to a specific user(s) based on data corresponding to the specific user(s) that is maintained in a user information store. In one embodiment, the information store is a unified store that is accessible by multiple programs including the operating system. Thus, new information or information changes can be made available to multiple programs by the user adding (or changing) the information only once. In another embodiment, the operating system image to be installed on a computer is pre-populated with user-specific information at the factory. The user-specific information can be integrated into the operating system at the factory or alternatively upon an initial boot of the computer by the user. | 01-21-2010 |
Xingwu Chai, Vancouver, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20110231500 | System and method for integrating support case or ticket management systems via email - A system and method for integrating a plurality of support case or ticket management systems via email is invented. Said system and method enable escalation of cases or tickets between existing support systems with no or limited customization. Said existing support system is any CRM, helpdesk or service desk system, and can be distributed across a plurality of organizations. The subject, body and other fields of a case can be represented by the subject, body and other fields of an email. And, because email is a built-in capability of many support systems, integration may be achieved without an adapter. | 09-22-2011 |
Xin-Sheng Chai, Atlanta, GA US
| Patent application number | Description | Published |
|---|---|---|
| 20090122307 | Sensor technique for black liquor oxidation control - A method for determining simultaneously from an oxidized black liquor sample an amount of sulfide, an amount of total dissolved solids, and an amount of effective alkali present in the sample, wherein the sulfide amount, the total dissolved solids amount, and the effective alkali amount are determined by subjecting the sample to attenuated total reflection (ATR) ultraviolet/visible (UV/V) spectroscopy over a wavelength of from about 190 to about 500 nm. Data from analyzing oxidized black liquor samples, and from analyzing one or more black liquor samples which may be subjected to black oxidation, may be used in a black liquor oxidation (BLOX) system for monitoring and/or controlling sulfur emissions from a kraft process. | 05-14-2009 |
Yanjie Chai, Marlboro, NJ US
| Patent application number | Description | Published |
|---|---|---|
| 20120101614 | System and Method for Manufacturing Optical Network Components - A system and method for calibrating optical components is disclosed. The method may include accumulating data indicative of the variation of selected variables with temperature for a batch of sample optical components, over an operating temperature range; determining the values of the selected variables at a single temperature of at least one new optical component for installation within an optical sub-assembly; and estimating the values of the selected variables as a function of temperature over the operating temperature range for the at least one new optical component based on the accumulated data and the values determined at the single temperature. | 04-26-2012 |
Yi Chai, Ithaca, NY US
| Patent application number | Description | Published |
|---|---|---|
| 20110245295 | BIOACTIVE PRE-TUBULYSINS AND USE THEREOF - The invention relates to bioactive pre-tubulysin derivatives, their preparation and pharmacological use. | 10-06-2011 |
Yongquan Chai, Columbus, IN US
| Patent application number | Description | Published |
|---|---|---|
| 20090241683 | MASS AIR FLOW SENSOR ADAPTOR - Mass air flow sensing for internal combustion engines. In one aspect, a sensor adaptor for use in an internal combustion engine includes an inlet housing including an approximately 90-degree elbow and directing air within the inlet housing to the internal combustion engine in an airflow direction. A mass air flow sensor is coupled to the housing at a location after the 90-degree elbow with respect to the airflow direction and senses the air flowing within the inlet housing. | 10-01-2009 |