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Chae, Yongin-Si
Hee-Soon Chae, Yongin-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20080212376 | METHODS OF OPERATING AND MANUFACTURING LOGIC DEVICE AND SEMICONDUCTOR DEVICE INCLUDING COMPLEMENTARY NONVOLATILE MEMORY DEVICE, AND READING CIRCUIT FOR THE SAME - Provided are a complementary nonvolatile memory device, methods of operating and manufacturing the same, a logic device and semiconductor device having the same, and a reading circuit for the same. The complementary nonvolatile memory device includes a first nonvolatile memory and a second nonvolatile memory which are sequentially stacked and have a complementary relationship. The first and second nonvolatile memories are arranged so that upper surfaces thereof are contiguous. | 09-04-2008 |
| 20100296347 | Method of erasing device including complementary nonvolatile memory devices - Provided are a complementary nonvolatile memory device, methods of operating and manufacturing the same, a logic device and semiconductor device having the same, and a reading circuit for the same. The complementary nonvolatile memory device includes a first nonvolatile memory and a second nonvolatile memory which are sequentially stacked and have a complementary relationship. The first and second nonvolatile memories are arranged so that upper surfaces thereof are contiguous. | 11-25-2010 |
Jisuk Chae, Yongin-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20120094626 | ELECTRONIC DEVICE AND METHOD FOR TRANSMITTING DATA - An electronic device and a method for transmitting data are disclosed. A network interface receives identification information to identify a communicating end from a mobile communication terminal. A controller acquires communicating end information based on the received identification information. A display displays the acquired communicating end information and at least one service area. | 04-19-2012 |
Jong-Hyeon Chae, Yongin-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20100134126 | PROBE AND METHOD FOR MANUFACTURING THE SAME - A probe for making electric contact with a contact target includes a first part ( | 06-03-2010 |
Ok-Sam Chae, Yongin-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20100239239 | METHOD AND APPARATUS FOR MOTION COMPENSATION - A motion compensation apparatus for a camera module with a half-shutter function is provided. The apparatus includes an initialization unit for selecting a subject, a motion of which is to be detected, from images secured in a half-shutter state, and calculates motion information of the subject; a tracking unit for tracking the selected subject and the motion information provided from the initialization unit, and calculates prediction information of the subject; and a controller for generating a control signal for controlling a speed of a shutter and a sensibility of an image sensor based on the prediction information provided from the tracking unit. | 09-23-2010 |
Seung-Hun Chae, Yongin-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20110074742 | PLASMA DISPLAY DEVICE - Disclosed is a plasma display device including a plasma display panel (PDP) including: a plurality of electrodes; a printed circuit board assembly (PBA) to drive the plasma display panel (PDP); and a chassis base including a first surface supporting the plasma display panel (PDP) and a second surface mounted with the printed circuit board assembly (PBA), wherein the edge of the plasma display panel (PDP) includes power signal lines to supply power to electrodes, the power signal lines are separated from the electrodes on the edge of the plasma display panel (PDP), the power signal lines are connected to the electrodes through the interface flexible printed circuit (FPC), and the resistivity of the power signal lines is lower than that of the electrodes. | 03-31-2011 |
| 20110074759 | PLASMA DISPLAY DEVICE - A plasma display device having a plasma display panel (PDP) including: a plurality of electrodes; a printed circuit board assembly (PBA) to drive the plasma display panel (PDP); and a chassis base including a first surface supporting the plasma display panel (PDP) and a second surface mounted with the printed circuit board assembly (PBA), wherein the PDP includes signal lines and a power line continuously formed on an edge of the PDP, electrode terminals connected to the electrodes the signal lines and the power lines, signal line terminals disposed on one side of the electrode terminals and connected to the signal lines, an alignment mark formed on at least at one side of the signal line terminals, and a power terminal disposed on a side of the alignment mark connected to the power line and supplying power to the PDP. | 03-31-2011 |
| 20110084895 | PLASMA DISPLAY DEVICE - A plasma display device including: a plasma display panel including a plurality of electrodes; a printed circuit board assembly (PBA) activating the plasma display panel (PDP); a chassis base, including: a first surface supporting the plasma display panel (PDP), and a second surface having the printed circuit board assembly (PBA); signal lines applying a voltage, a data signal, and a control signal to the electrodes are formed at the end of the plasma display panel (PDP); and an interface flexible printed circuit connecting the signal lines to the printed circuit board assembly (PBA), wherein at least one of the signal lines has a line width at a portion further from the interface flexible printed circuit (FPC) that is larger than a line width at a portion closer to the interface flexible printed circuit (FPC). | 04-14-2011 |
Soodoo Chae, Yongin-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20100248457 | METHOD OF FORMING NONVOLATILE MEMORY DEVICE - Provided is a method of forming a nonvolatile memory device. The method may include alternatingly stacking n number of dielectric layers and n number of conductive layers on a substrate, forming a non-photosensitive pattern on the alternatingly stacked dielectric layers and conductive layers, etching the i-th conductive layer and i-th dielectric (2≦i≦n, i is a natural number indicating a stacking order of the conductive layers and the dielectric layers) by using the non-photosensitive pattern as an etch mask, laterally etching a sidewall of the non-photosensitive pattern and etching the i-th conductive layer, (i−1)-th conductive layer, i-th dielectric layer and (i−1)-th dielectric layer by using the etched non-photosensitive pattern as an etch mask. | 09-30-2010 |
| 20100252909 | Three-Dimensional Memory Devices - An integrated circuit memory device may include a semiconductor substrate and a plurality of word-line layers wherein adjacent word-line layers are separated by respective word-line insulating layers. A plurality of active pillars may extend from a surface of the semiconductor substrate through the plurality of word-line layers and insulating layers. Dielectric information storage layers may be provided between the active pillars and the respective word-line layers. Related methods of operation and fabrication are also discussed. | 10-07-2010 |
