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Ceballos

Ariel Gregorio Ceballos, Livermore, CA US

Patent application numberDescriptionPublished
20100161646CRITERIA BUILDER FOR QUERY BUILDER - Systems and methods are provided that programmatically provide a user interface for forming a query, comprising. A query builder displays a first row of query criteria, a second row of query criteria, the second row being logically connected to the first row by a first Boolean connector, and a third row of query criteria, the third row being logically connected to the second row by a second Boolean connector. In response to a user drag-and-drop operation, the query builder nests the third row of query criteria in the second row of query criteria. Thus, a drag-and-drop operation obviates the need for cumbersome groups of parentheses when defining the order of operation of the query.06-24-2010

Jose Luis Ceballos, Villach AT

Patent application numberDescriptionPublished
20090085617RAMP VOLTAGE CIRCUIT - Implementations related to ramp voltage generating circuits and systems implementing the same are presented herein.04-02-2009
20090121642Organic Light Emitting Diode Driver - Pulse width modulation (PWM) of a drive current to an organic light emitting diode (OLED) is performed by a circuit subjected to corresponding signaling.05-14-2009
20090121778Anti-Shock Methods for Processing Capacitive Sensor Signals - A low impedance coupling to bias voltage dissipates abnormal charge levels within a microphone in response to a shock event such as dropping or bumping. High impedance coupling to bias voltage is thereafter restored.05-14-2009
20090140898Jitter Insensitive Single Bit Digital to Analog Converter - Systems and methods for a jitter insensitive 1-bit digital to analog converter (DAC) are described. The jitter insensitive 1-bit DAC employed in the feedback loop of a delta sigma analog to digital converter (ADC) converts a 1-bit digital data into the corresponding analog output.06-04-2009
20090140899Double Sampling DAC and Integrator - This disclosure relates to systems and methods for analog to digital conversion using delta sigma modulation. To this end, the delta sigma modulator includes a double sampling DAC and integrator and a 1-bit comparator, with reference loading insensitivity.06-04-2009
20100097255Temperature Compensated Delta-Sigma Modulators with Logarithmic Dynamic Range - Disclosed herein is a delta sigma (ΔΣ or DS) modulator and method for operating the same, the modulator including at least a first proportional to absolute temperature (PTAT) element that conditions an input signal, and a second PTAT element that conditions a reference signal.04-22-2010
20100308915Phase Margin Modification In Operational Transconductance Amplifiers - The present disclosure relates to phase margin modification in operational transconductance amplifiers.12-09-2010
20110037629Coupled Delta-Sigma Modulators - An apparatus and method for reducing error in converting a multi-bit signal to a single bit signal. An analog delta-sigma modulator receives an analog signal and converts it to a multi-bit digital signal that is provided to a digital delta-sigma modulator. The digital delta-sigma modulator introduces error by converting the multi-bit signal to a single-bit signal. The error from the conversion is fed back to the analog delta-sigma modulator which incorporates the error information into the analog signal before it is converted to a multi-bit digital signal.02-17-2011

Patent applications by Jose Luis Ceballos, Villach AT

Thomas Ceballos, Spring Lake Park, MN US

Patent application numberDescriptionPublished
20100187206Terminal Platforms for Batteries in Implantable Medical Devices - A terminal platform comprising a first terminal block securable to a housing of the battery, a second terminal block configured to electrically connect to a terminal wire of the battery, and an insulating support electrically isolating the second terminal block from the first terminal block.07-29-2010

Patent applications by Thomas Ceballos, Spring Lake Park, MN US

Thomas I. Ceballos, Spring Lake Park, MN US

Patent application numberDescriptionPublished
20090266573Assembly Method for Implantable Medical Device - An implantable medical device (IMD) having a hermetic housing formed from a case and a cover each having an exterior surface and an interior surface. An IMD component is mounted to the interior surface of the cover and has an electrical contact. A hybrid circuit is assembled in the case. The IMD component electrical contact is electrically coupled to the to the hybrid circuit assembled in the case.10-29-2009
20100249871Full Visibility Lead Retention - This application discusses, among other things, an implantable medical device including a setscrew that enables lead tip visibility as an indicator of full lead insertion without requiring a grommet. An example setscrew has a metal core with an insulative coating disposed over the core to electrically isolate it from body fluids and surrounding tissue. In another example, the setscrew incorporates a sealing capability by including a sealing member that is coupled to the setscrew.09-30-2010