| Patent application number | Description | Published |
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| 20090109185 | Electronic Document Reader - We describe a display device for displaying an electronic document page comprising a central rewritable portion, a non-rewritable border with external lateral physical dimensions defined by the display edges, wherein said border is coloured to substantially match a background colour of said central rewritable portion such that when a foreground part of said document page is displayed on said central rewritable portion the appearance of margins of said document page is provided by said background coloured border whereby in use said displayed electronic document page appears to extend up to said display edges, and wherein the surface of the display is substantially flat over the lateral physical dimensions from the central rewritable portion across the border to the display edges. | 04-30-2009 |
| 20090113291 | Electronic Document Reader - We describe a method of displaying a document page with a predetermined size using a display device having edges defining lateral dimensions not substantially larger than said predetermined size and having a central re-writable display portion and a non-re-writable border, said document page comprising a central, foreground portion bearing one or both of text and graphics, a background having a background colour and at least one margin having said background colour, the method comprising: inputting page data defining a page for display; processing said page data to crop margins of said page such that, when displayed on said re-writable display portion, said non-re-writable border gives the appearance of said cropped margins, said processing generating cropped page data; and outputting said cropped page data for display on said re-writable display portion of said display. | 04-30-2009 |
| 20100018956 | ELIMINATION OF SHORT CIRCUITS BETWEEN CONDUCTORS BY LASER ABLATION - A method of selectively eliminating electrical shorts and other electrical defects from specific layers of a multilayer electronic device without damaging underlying layers. The method is based on a combination of an automated detection of the defects and selective laser ablation patterning (SLAP). | 01-28-2010 |
| Patent application number | Description | Published |
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| 20090166612 | Techniques for Device Fabrication with Self-Aligned Electrodes - This invention relates to the fabrication of electronic devices, such as thin-film transistors, in particular thin-film transistors in which patterning techniques are used for definition of electrode patterns that need to be accurately aligned with respect to underlying electrodes. The fabrication technique is applicable to various patterning techniques, such as laser ablation patterning or solution-based, direct-write printing techniques which are not capable of forming structures with a small linewidth, and/or that cannot be positioned very accurately with respect to previously deposited patterns. We thus describe self-aligned gate techniques which are applicable for both gate patterning by a subtractive technique, in particular selective laser ablation patterning, and gate patterning by an additive technique such as printing. The techniques facilitate the use of low-resolution gate patterning. | 07-02-2009 |
| 20090212292 | Layer-selective laser ablation patterning - A method of fabricating an organic electronic device is provided. The organic electronic device has a structure including an upper conductive layer and an underlying layer immediately beneath said upper conducting layer and having at least one solution process able semiconducting layer. The upper conducting layer preferably has a thickness of between 10 nm and 200 nm. The method includes patterning said upper conductive layer of said structure by: laser ablating said upper conductive layer using a pulsed laser to remove regions of upper conductive layer from said underlying layer for said patterning; and wherein said laser ablating uses a single pulse of said laser to substantially completely remove a said region of said upper conductive layer to expose said underlying layer beneath | 08-27-2009 |
| 20090298299 | LASER ABLATION OF ELECTRONIC DEVICES - The present invention relates to methods of fabricating electronic devices using laser ablation and to devices fabricated thereby. Embodiments of the methods are particularly suitable for defining electrodes within thin film transistor (TFT) structures using laser ablation in a step-and-repeat mode. A method of fabricating an electronic device, the device comprising a plurality of layers on a substrate, the layers including an upper conductive layer and at least said conductive layer and said substrate, the method comprising: patterning said underlying layer; and patterning said upper conductive layer by laser ablation using a stepwise process in which successive areas of said upper conductive layer are ablated by successively applied laser patterns; wherein said successively applied laser patterns overlap one another in an overlap region; and wherein said method further comprises configuring a said laser pattern and said patterned underlying layer with respect to one another such that in a said overlap region said patterned underlying layer is substantially undamaged by said stepwise laser ablation. | 12-03-2009 |
