Patent application number | Description | Published |
20100259964 | TECHNIQUES FOR PROVIDING A SEMICONDUCTOR MEMORY DEVICE - Techniques for providing a semiconductor memory device are disclosed. In one particular exemplary embodiment, the techniques may be realized as a semiconductor memory device including a plurality of memory cells arranged in an array of rows and columns. Each memory cell may include a first region connected to a source line extending in a first orientation. Each memory cell may also include a second region connected to a bit line extending a second orientation. Each memory cell may further include a body region spaced apart from and capacitively coupled to a word line, wherein the body region is electrically floating and disposed between the first region and the second region. The semiconductor device may also include a first barrier wall extending in the first orientation of the array and a second barrier wall extending in the second orientation of the array and intersecting with the first barrier wall to form a trench region configured to accommodate each of the plurality of memory cells. | 10-14-2010 |
20140106556 | METHOD FOR MANUFACTURING A DUAL WORK FUNCTION SEMICONDUCTOR DEVICE - A method of manufacturing a dual work function semiconductor device is disclosed. In one aspect, the method includes providing a substrate having first and second areas for forming first and second transistor types. The method additionally includes forming a dielectric layer on the substrate, which extends to cover at least parts of the first and second areas. The method additionally includes forming a first metal layer/stack on the dielectric layer in the first area, where the first metal layer/stack comprises a first work function-shifting element. The method additionally includes forming a second metal layer/stack on the first metal layer in the first area and on the dielectric layer in the second area, where the second metal layer/stack comprises a second work function-shifting element. The method additionally includes annealing to diffuse the first work function-shifting element and the second work function-shifting element into the dielectric layer, and subsequently removing the first metal layer/stack and the second metal layer/stack. The method further includes forming a third metal layer/stack in the first and second predetermined areas. | 04-17-2014 |
20140187039 | Method for Tuning the Effective Work Function of a Gate Structure in a Semiconductor Device - A method for tuning the effective work function of a gate structure in a semiconductor device is described. The semiconductor device is part of an integrated circuit and the gate structure has a metal layer and a high-k dielectric layer separating the metal layer from an active layer of the semiconductor device. The method includes providing an interconnect structure of the integrated circuit on top of the gate structure, the interconnect structure comprising a layer stack comprising at least a pre-metal dielectric layer comprising a metal filled connecting via connected to the gate structure through the pre-metal dielectric layer, and the interconnect structure having an upper exposed metal portion; and, thereafter, exposing at least a portion of the upper exposed metal portion to a plasma under predetermined exposure conditions, to tune the effective work function of the gate structure. | 07-03-2014 |
20140291763 | TECHNIQUES FOR PROVIDING A SEMICONDUCTOR MEMORY DEVICE - Techniques for providing a semiconductor memory device are disclosed. In one embodiment, the techniques may be realized as a semiconductor memory device including a plurality of memory cells arranged in an array of rows and columns. Each memory cell may include a first region connected to a source line extending in a first orientation, a second region connected to a bit line extending a second orientation, and a body region spaced apart from and capacitively coupled to a word line, wherein the body region is electrically floating and disposed between the first region and the second region. The semiconductor device may also include a first barrier wall extending in the first orientation of the array and a second barrier wall extending in the second orientation of the array and intersecting with the first barrier wall to form a trench region configured to accommodate each of the plurality of memory cells. | 10-02-2014 |
Patent application number | Description | Published |
20080255646 | Non-rectilinear lead and a system for deep electrical neurostimulation including such a lead - A lead for deep brain electrical stimulation, to be inserted into liquid cavities, such as ventricles, or cysternae or subarachnoidal spaces, the lead comprising: a tubular body of biocompatible material having a side wall defining a lumen, said tubular body being suitable for being inserted over at least a fraction of its length into the inside of a patient's body in order to reach a region for stimulation; electrodes disposed close to a distal end of the tubular body; and a rigid stylet for inserting removably into the lumen of said tubular body; the lead being wherein said tubular body has an equilibrium shape that is not rectilinear, being different from the shape of the stylet and presenting one and only one bend, and that is sufficiently flexible and elastic to follow the shape of said stylet by deforming reversibly when the stylet is inserted into the lumen. A deep electrical neurostimulation system comprising an electrical pulse generator and at least one such lead having its electrodes electrically connected to said generator. | 10-16-2008 |
20090012593 | Multiple electrode lead and a system for deep electrical neurostimulation including such a lead - A lead for deep electrical neurostimulation, the lead comprising:
| 01-08-2009 |
20090317835 | DEVICE FOR SAMPLING CELLS BY CONTACT - A microtechnological device ( | 12-24-2009 |
20100049083 | DEVICE FOR CONTACT MOLECULAR SAMPLING | 02-25-2010 |
20110002526 | Method and Apparatus for Counting Thrombocytes - A method of counting thrombocytes contained in a sample of blood, the method having the steps:
| 01-06-2011 |
20110264166 | MULTIPLE ELECTRODE LEAD AND A SYSTEM FOR DEEP ELECTRICAL NEUROSTIMULATION INCLUDING SUCH A LEAD - A lead for deep electrical neurostimulation, the lead comprising:
| 10-27-2011 |
20130079663 | Device for Transiently Contacting At Least One Unit For Capturing Biological Targets With A Fluid Containing Them, Method For Recovering The Captured Targets And System For Contacting And Recovery - The invention relates to a device for transiently contacting at least one unit for capturing biological targets with a body fluid containing them, a method for recovering the captured targets for analysis, and a system for contacting and recovering a capture substrate included in said unit. The invention relates to samples obtained in particular in vivo from body fluids of the human body, e.g. circulating body fluids, said fluids possibly containing, as targets, proteins, oligonucleotides such as RNA or DNA, antibodies, enzymes or cells. A contacting device ( | 03-28-2013 |
20140008224 | METHOD AND MICROSYSTEM FOR DETECTING ANALYTES WHICH ARE PRESENT IN DROPS OF LIQUID - A detection method of detecting analytes of interest which are present in a liquid. The detection method including the steps of forming drops of liquid on a first surface by capillary breaking of a finger of liquid, which is initially formed by liquid dielectrophoresis. The thus formed drops each come into contact with a different detection surface, which is arranged facing the first surface. Analytes of interest which are present in each of the drops are detected at the corresponding detection surface. | 01-09-2014 |