| Patent application number | Description | Published |
|---|
| 20080213702 | METHOD FOR PATTERNING CONDUCTIVE POLYMER - A method for patterning a conductive polymer that adheres well to an oxide layer is presented. The method includes forming a self-assembled monolayer on a substrate, patterning the self-assembled monolayer, forming a catalyst layer on the self-assembled monolayer, and forming a conductive polymer layer on the self-assembled monolayer. | 09-04-2008 |
| 20090039350 | Display panel and method of manufacturing the same - In a display panel and a method of manufacturing the display panel, a gate line, a data line, and source and drain electrodes including a same material as the data line are formed on a substrate constituting the display panel, and the data line includes an aluminum based alloy containing sufficient nickel to inhibit corrosion during dry etching. The corrosion resistance of the AlNi-containing alloy helps prevent corrosion of the data line, the source electrode, and the drain electrode during selective dry etching that shapes these lines and electrodes. | 02-12-2009 |
| 20090212290 | DISPLAY PANEL AND METHOD FOR MANUFACTURING THE SAME - A display panel includes; a lower gate line, a lower data line disposed substantially perpendicular to the lower gate line, a thin film transistor (“TFT”) connected to the lower gate line and the lower data line, an insulating layer disposed on the lower gate line, the lower data line, and the TFT and having a plurality of trenches exposing the lower gate line and the lower data line, an upper gate line disposed in the trench on the lower gate line, an upper data line disposed in the trench on the lower data line, and a pixel electrode connected to the TFT. | 08-27-2009 |
| 20100022055 | THIN FILM TRANSISTOR, THIN FILM TRANSISTOR SUBSTRATE INCLUDING THE SAME AND METHOD OF MANUFACTURING THE SAME - A thin film transistor showing desirable contact characteristics during contact with indium tin oxide (ITO) or indium zinc oxide (IZO), in which a first conductive pattern including a gate electrode and a second conductive pattern including a source electrode and a drain electrode are formed without an etching process, a TFT substrate including the TFTs, and a method of manufacturing the same. The thin film transistor includes a gate electrode formed of a first conductive layer, a gate insulating layer covering the gate electrode, a semiconductor layer forming a channel on the gate insulating layer; an ohmic contact layer formed on the semiconductor layer, and a source electrode and a drain electrode formed of a second conductive layer and of a third conductive layer. The second conductive layer includes an aluminum-nickel alloy and nitrogen and is formed on the semiconductor layer. The third conductive layer includes an aluminum-nickel alloy and is formed on the second conductive layer. | 01-28-2010 |
| 20100044717 | THIN FILM TRANSISTOR PANEL AND METHOD OF MANUFACTURING THE SAME - After forming a signal line including aluminum, an upper layer of an oxide layer including aluminum that covers the signal line is formed in the same chamber and by using the same sputtering target as the signal line, or a buffer layer of an oxide layer including aluminum is formed in a contact hole exposing the signal line during the formation of the contact hole. Accordingly, the contact characteristic between an upper layer including indium tin oxide (“ITO”) or indium zinc oxide (“IZO”) and the signal line may be improved to enhance the adhesion therebetween while not increasing the production cost of the thin film transistor (“TFT”) array panel. | 02-25-2010 |
| 20100155715 | DISPLAY SUBSTRATE, AND METHOD OF MANUFACTURING THE SAME - A display substrate according to the present invention comprises a gate line formed on a substrate. a data line, a thin film transistor connected to the gate line and the data line respectively and pixel electrode connected to the thin film transistor, wherein a channel of the thin film transistor is formed in a direction perpendicular to the substrate and, a layer where the channel is formed includes an oxide semiconductor pattern. ON current of thin film transistor of the display substrate can be increased without loss of aperture ratio. | 06-24-2010 |
| 20100244032 | ALUMINUM-NICKEL ALLOY WIRING MATERIAL, DEVICE FOR A THIN FILM TRANSISTOR AND A THIN FILM TRANSISTOR SUBSTRATE USING THE SAME, AND METHOD OF MANUFACTURING THE THIN FILM TRANSISTOR SUBSTRATE - An Aluminum-Nickel alloy wiring material includes Aluminum, Nickel, Cerium, and Boron. A thin film transistor includes the Aluminum-Nickel alloy wiring material. A sputtering target comprises Aluminum, Nickel, Cerium and Boron. A method of manufacturing a thin film transistor substrate comprises disposing a thin film transistor on a substrate, wherein the thin film transistor includes a wiring circuit layer comprising Aluminum, Nickel, Cerium, and Boron. The Nickel, Cerium and Boron satisfy the following inequalities; 0.5≦X≦5.0, 0.01≦Y≦1.0, and 0.01≦Z≦1.0, respectively, wherein X represents an atomic percentage of Nickel content, Y represents an atomic percentage of Cerium content, and Z represents an atomic percentage of Boron content. | 09-30-2010 |
| 20110097961 | DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME - In a display panel and a method of manufacturing the display panel, a gate line, a data line, and source and drain electrodes including a same material as the data line are formed on a substrate constituting the display panel, and the data line includes an aluminum based alloy containing sufficient nickel to inhibit corrosion during dry etching. The corrosion resistance of the AlNi-containing alloy helps prevent corrosion of the data line, the source electrode, and the drain electrode during selective dry etching that shapes these lines and electrodes. | 04-28-2011 |
| 20110108839 | Thin Film Transistor Substrate and Manufacturing Method Thereof - A thin film transistor array panel according to an exemplary embodiment of the present invention comprises a substrate, a gate line formed on the substrate, a gate insulating layer formed on the gate line, a semiconductor layer formed on the gate insulating layer, and a data line formed on the semiconductor layer, wherein the data line comprises a lower data layer, an upper data layer, a data oxide layer, and a buffer layer, wherein the upper data layer and the buffer layer comprise a same material. | 05-12-2011 |
| 20110133193 | THIN FILM TRANSISTOR SUBSTRATE AND THE METHOD THEREOF - A thin film transistor array panel includes a gate line, a gate insulating layer that covers the gate line, a semiconductor layer that is disposed on the gate insulating layer, a data line and drain electrode that are disposed on the semiconductor layer, a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode, and a pixel electrode that is electrically connected to the drain electrode through the contact hole. The data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, and the lower layer is wider than the upper layer, and the lower layer has a region that is exposed. The gate insulating layer may have a step shape. | 06-09-2011 |
