| Patent application number | Description | Published |
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| 20080229031 | Method of Automated Resource Management In A Partition Migration Capable Environment - A method, system and program are disclosed for automatically adjusting the allocation of a plurality of information processing system (IPS) resources among a plurality of logical partitions (LPARs). An LPAR is created on a first central processor complex (CPC) and a first LPAR identifier is generated. A configuration change manager is implemented on the LPAR to communicate changes in the LPAR's identifier to an automated resource manager (ARM). IPS resources are automatically allocated to the LPAR. If the LPAR is migrated a second CPC, a second LPAR identifier is similarly generated, resulting in an LPAR configuration change event. The ARM is notified that the migrated LPAR's identifier has changed and receives the changed LPAR identifier. Comparison operations are performed to determine whether the second LPAR identifier matches the first CPC. If not, resources allocated to the migrated LPAR are released for automated allocation to other LPARs comprising the first CPC. | 09-18-2008 |
| 20080235684 | Heuristic Based Affinity Dispatching for Shared Processor Partition Dispatching - A mechanism is provided for determining whether to use cache affinity as a criterion for software thread dispatching in a shared processor logical partitioning data processing system. The server firmware may store data about when and/or how often logical processors are dispatched. Given these data, the operating system may collect metrics. Using the logical processor metrics, the operating system may determine whether cache affinity is likely to provide a significant performance benefit relative to the cost of dispatching a particular logical processor to the operating system. | 09-25-2008 |
| 20090150575 | Dynamic logical data channel assignment using time-grouped allocations - A method, system and program are provided for dynamically allocating DMA channel identifiers to multiple DMA transfer requests that are grouped in time by virtualizing DMA transfer requests into an available DMA channel identifier using a channel bitmap listing of available DMA channels to select and set an allocated DMA channel identifier. Once the input values associated with the DMA transfer requests are mapped to the selected DMA channel identifier, the DMA transfers are performed using the selected DMA channel identifier, which is then deallocated in the channel bitmap upon completion of the DMA transfers. When there is a request to wait for completion of the data transfers, the same input values are used with the mapping to wait on the appropriate logical channel. With this method, all available logical channels can be utilized with reduced instances of false-sharing. | 06-11-2009 |
| 20090150576 | Dynamic logical data channel assignment using channel bitmap - A method, system and program are provided for dynamically allocating DMA channel identifiers by virtualizing DMA transfer requests into available DMA channel identifiers using a channel bitmap listing of available DMA channels to select and set an allocated DMA channel identifier. Once an input value associated with the DMA transfer request is mapped to the selected DMA channel identifier, the DMA transfer is performed using the selected DMA channel identifier, which is then deallocated in the channel bitmap upon completion of the DMA transfer. When there is a request to wait for completion of the data transfer, the same input value is used with the mapping to wait on the appropriate logical channel. With this method, all available logical channels can be utilized with reduced instances of false-sharing. | 06-11-2009 |
| 20090327613 | System and Method for a Software Managed Cache in a Multiprocessing Environment - A method for implementing a software-managed cache comprises determining an object identifier (ID) for each of a first set of objects of a plurality of objects resident in a local memory, to generate a first cache table, the first cache table comprising a plurality of entries. Each object comprises an object ID and an effective address. The method receives a request for an object, the request comprising an object ID. The method compares the received object ID with the entries in the first cache table. In the event the received object ID matches an entry in the first cache table, the method returns the matching entry in response to the request. In the event the received object ID does not match an entry in the first cache table, the method calculates an effective address in the local memory of the object associated with the object ID. | 12-31-2009 |
| 20110191785 | Terminating An Accelerator Application Program In A Hybrid Computing Environment - Terminating an accelerator application program in a hybrid computing environment that includes a host computer having a host computer architecture and an accelerator having an accelerator architecture, where the host computer and the accelerator are adapted to one another for data communications by a system level message passing module (‘SLMPM’), and terminating an accelerator application program in a hybrid computing environment includes receiving, by the SLMPM from a host application executing on the host computer, a request to terminate an accelerator application program executing on the accelerator; terminating, by the SLMPM, execution of the accelerator application program; returning, by the SLMPM to the host application, a signal indicating that execution of the accelerator application program was terminated; and performing, by the SLMPM, a cleanup of the execution environment associated with the terminated accelerator application program. | 08-04-2011 |
| Patent application number | Description | Published |
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| 20080235668 | OPERATING SYSTEM SUPPORT FOR THREAD-LEVEL BREAKPOINTS - A computer implemented method, apparatus, and computer usable program code for processing breakpoints. A breakpoint is detected during execution of a process. A thread that is currently executing is identified as an identified thread. A determination is made as to whether the breakpoint is applicable to the identified thread. In response to the determination that the breakpoint is applicable to the identified thread, the execution of the process is halted. Execution of the process continues without halting execution of the process if the breakpoint is inapplicable to the identified thread. | 09-25-2008 |
| 20090037703 | CONDITIONAL DATA WATCHPOINT MANAGEMENT - A method, system and computer program product for managing a conditional data watchpoint in a set of instructions being traced is shown in accordance with illustrative embodiments. In one particular embodiment, the method comprises initializing a conditional data watchpoint and determining the watchpoint has been encountered. Upon that determination, examining a current instruction context associated with the encountered watchpoint prior to completion of the current instruction execution, further determining a first action responsive to a positive context examination; otherwise, determining a second action. | 02-05-2009 |
| 20100106880 | MANAGING MISALIGNED DMA ADDRESSES - A system and method operable to manage misaligned direct memory access (DMA) data transfers is provided. This method involves determining a delta between N bytes of data to be copied from within a local side buffer (source location) to a remote buffer (destination location). After the delta is determined a tail of the same length is copied to temporary storage. Then the N bytes of data on the local side buffer minus the tail will be shifted to align the N bytes of data to be copied from within the local side buffer to the starting address of the destination location in the remote buffer. The pre-shifted N bytes of data within the local side buffer may be DMA transferred to the remote buffer. The tail transferred to temporary storage may then be copied from temporary storage to the remote buffer | 04-29-2010 |
| 20100174946 | Method for Debugging a Hang Condition in a Process Without Affecting the Process State - Embodiments of the invention are associated with an application process that comprises multiple threads, wherein threads of the process are disposes to run on a data processing system, and each thread can have a user mode or a kernel mode machine state, or both, selectively, when it is running. An embodiment directed to a method comprises the steps of allocating a specified memory location for each of the threads, and responsive to a given thread entering a sleep state, selectively saving the kernel mode machine state of the given thread in the specified memory location for the given thread. The saved machine state comprises the state of the given thread immediately prior to the given thread entering the sleep state. In response to detecting a hang condition in the operation of the process, a debugger is attached to the process to access at least one of the saved user mode machine states. The method further includes analyzing information provided by the at least one accessed machine state to determine the cause of the hang condition, and restoring the original state upon detachment, so the debugger attachment is completely transparent to the target process. | 07-08-2010 |
