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Burda
Clemens Burda, Cleveland Heights, OH US
| Patent application number | Description | Published |
|---|---|---|
| 20100211146 | PHOTOELECTRIC ACTIVATION OF NEURONS USING NANOSTRUCTURED SEMICONDUCTORS - A photoelectric stimulating electrode for photoelectric activation of a neuron includes a plurality of semiconductor nanoparticles adapted to be positioned proximate a neuron. The semiconductor nanoparticles upon excitation with light of a first wave length generate an electric field and/or current effective to stimulate the neuron. | 08-19-2010 |
Cullen Burda, Berkeley, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100107514 | Methods and apparatus for a building roof structure - A foam core cement construction panel having shear members and lateral rails that form a channel-beam-like structure and novel methods of using the panels to form an integrated roof structure that serves three separate functions: (1) the roof load structure assembly; (2) the roof's exterior waterproof assembly; and (3) the roof's exposed interior ceiling assembly and which can include internal hydronics for added climate control. | 05-06-2010 |
David Burda, Prague CZ
| Patent application number | Description | Published |
|---|---|---|
| 20080211473 | SYNCHRONOUS RECTIFIER HAVING PRECISE ON/OFF SWITCHING TIME - A synchronous rectifier, including an energy storage element having a terminal; a power supply input, connected to the terminal of the storage element in a first time interval; a reference line connected to the terminal of the storage element in a second time interval; and a zero comparator, coupled to the terminal of the storage element to detect a current flowing in the energy storage element and disconnect the terminal of the storage element from the reference line upon detecting a zero current, the zero comparator having an offset and a propagation time; the zero comparator further having an offset control input and an output. An offset regulating loop is coupled between the output of the zero comparator and the offset control input and regulates the offset of the zero comparator to compensate the propagation time. | 09-04-2008 |
Gregory Christopher Burda, Raleigh, NC US
| Patent application number | Description | Published |
|---|---|---|
| 20100182816 | Power Saving Static-Based Comparator Circuits and Methods and Content-Addressable Memory (CAM) Circuits Employing Same - Static-based comparators and methods for comparing data are disclosed. The static-based comparator is configured to selectively switch at least one comparator output in response to a comparison of corresponding data with compare data, and a validity indicator for the data. If the validity indicator indicates valid data, the static-based comparator switches to drive the comparator output indicating either a match or mismatch between corresponding compared data. If the validity indicator indicates invalid data, the static-based comparator provides a mismatch on the comparator output without switching the static-based comparator regardless of whether or not the data matches the compare data. In this manner, the static-based comparator does not dissipate power switching the comparator output for data marked invalid. The static-based comparator can be employed in content addressable memories (CAMs) for comparing one or more bits of tag data to corresponding bit(s) of compare data. | 07-22-2010 |
| 20110197021 | Write-Through-Read (WTR) Comparator Circuits, Systems, and Methods Employing Write-Back Stage and Use of Same With A Multiple-Port File - Write-through-read (WTR) comparator circuits and related WTR processes and memory systems are disclosed. The WTR comparator circuits can be configured to perform WTR functions for a multiple port file having one or more read and write ports. One or more WTR comparators in the WTR comparator circuit are configured to compare a read index into a file with a write index corresponding to a write-back stage selected write port among a plurality of write ports that can write data to the entry in the file. The WTR comparators then generate a WTR comparator output indicating whether the write index matches the read index to control a WTR function. In this manner, the WTR comparator circuit can employ less WTR comparators than the number of read and write port combinations. Providing less WTR comparators can reduce power consumption, cost, and area required on a semiconductor die for the WTR comparator circuit. | 08-11-2011 |
Jiri Burda, Friedrichsdorf DE
| Patent application number | Description | Published |
|---|---|---|
| 20110260031 | MULTIFUNCTIONAL SUPPLY ELEMENT - The invention relates to a multifunctional supply element with different functional elements for the emission of heat, light radiation or audio or video information. The known supply elements consist of radiant heaters and lighting elements, which are arranged in separate or a common housing. | 10-27-2011 |
Richard G. Burda, Hopewell Junction, NY US
| Patent application number | Description | Published |
|---|---|---|
| 20090265026 | METHOD AND SYSTEM FOR SETTING RATES AND TARGETS IN A RANGE MANAGEMENT SYSTEM - A method and apparatus includes determining a number of planned starts of a product during a predetermined time period for future processing, averaging the number of planned starts for the predetermined time period, and setting a production rate for a first range based on the average number of planned starts. | 10-22-2009 |
Richard G. Burda, Pleasant Valley, NY US
| Patent application number | Description | Published |
|---|---|---|
| 20090299510 | METHOD FOR MINIMIZING PRODUCTIVITY LOSS WHILE USING A MANUFACTURING SCHEDULER - Tools and/or resources which newly become available to a re-entrant flow manufacturing line, data processing pipeline or the like are allocated in substantially real time to processing operations independent of and consistent with a scheduling segment previously generated by dispatching items such as workpieces or data to tools and/or resources of a manufacturing line until the newly available tool or resource can be conveniently included in a subsequently generated schedule segment in order to avoid productivity loss due to schedule latency. Items can be dispatched in a priority order to accelerate completion of processing. A schedule segment including the newly available tool or resource can be facilitated by merging allocations of a real time dispatch list with allocations of a dispatch list corresponding to a previously generated schedule segment. | 12-03-2009 |
| 20110112675 | PRODUCT RELEASE CONTROL INTO TIME-SENSITIVE PROCESSING ENVIRONMENTS - A method identifies time sensitive processing sequences within a production environment using a computerized device. The processing sequences perform operations utilizing one or more tools. The method also identifies non-committed work in process items that are grouped in non-committed lots for release into one or more of the time sensitive processing sequences, and identifies committed work in process items that are being processed in committed lots within the time sensitive processing sequences, using the computerized device. The method sorts the non-committed lots by a predetermined priority, again using the computerized device. Starting with the highest priority non-committed lot (and continuing with others of the non-committed lots in priority order) the method determines whether there is available tool capacity to process a non-committed lot through each corresponding time sensitive processing sequence using the computerized device. If the tool capacity is available for the non-committed lot, the method releases the non-committed lot to begin the corresponding time sensitive processing sequences, using the computerized device. | 05-12-2011 |
Richard Gerard Burda, Pleasant Valley, NY US
| Patent application number | Description | Published |
|---|---|---|
| 20090138114 | METHOD OF RELEASE AND PRODUCT FLOW MANAGEMENT FOR A MANUFACTURING FACILITY - A method and computer program product for scheduling product lots through operations of a manufacturing line. The method including: selecting a set of sequential operations required to manufacture the lots; partitioning the product lots into designated lots and non-designated lots; and generating a release schedule for each of the non-designated lots into one or more operations of the set of sequential operations; generating a release schedule for each of the designated lots into each operation of set of sequential operations such that for each designated lot a total amount of time measured from completion of a first operation of the set of sequential operations through start of a last operation of the set of sequential operations does not exceed a target amount of time for the designated lots. | 05-28-2009 |