Bulsara
Adi Bulsara, San Diego, CA US
Patent application number | Description | Published |
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20100219862 | RECONFIGURABLE AND RELIABLE LOGIC CIRCUIT ELEMENTS THAT EXPLOIT NONLINEARITY AND NOISE - A logic gate is adapted to implement logical expressions. The logic gate includes at least one input that is adapted to receive an input signal and at least one control signal. At least one of the input signal and the control signal is a noise signal. At least one output is adapted to produce an output signal. A nonlinear updater operates as a dynamically configurable element and produces multiple different logic gates as selected by the control signal based at least in part on the noise signal. The nonlinear updater is electrically coupled to the input and is also electrically coupled to the output. The nonlinear updates is configured to apply a nonlinear function to the input signal in response to the control signal to produce the output signal representing a logical expression being implemented by one of the multiple different logic gates on the input signal. | 09-02-2010 |
Adi R. Bulsara, San Diego, CA US
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20090195245 | Coupled Fluxgate Magnetometers for DC and Time-Varying Target Magnetic Field Detection - An apparatus for sensing and processing a magnetic flux signal comprising: an odd number of at least three fluxgate modules, a summer, and a processor. Each fluxgate module is configured to generate a module response signal upon receiving the magnetic flux signal. The fluxgate modules are circularly coupled to each other such that only one-way signal flow is allowed between them. The summer is configured to sum the response signals from each fluxgate module into a summed signal. The processor is configured to receive and process the summed signal. | 08-06-2009 |
Adi Ratan Bulsara, San Diego, CA US
Patent application number | Description | Published |
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20160139190 | Sensor Incorporating Multiferroic Materials For Detecting Both Electric and Magnetic Fields - A sensor for detecting both magnetic fields and electric fields can include at least one Sawyer-Tower (ST) circuit that can incorporate a multiferroic capacitor. An odd number of ST circuits coupled together in a ring configuration, so that for each ST circuit, the output of one ST circuit is an input to another of the ST circuits. The multiferroic capacitors can include a multiferroic layer that can be deposed on a substrate. For each multiferroic capacitor, the deposition process can cause an inherent amount of impurities in the multiferroic layer. The number of said odd number of ST circuits to be coupled together is chosen according to the amount of impurities, to “forgive” the impurities. The higher the level of impurities in the multiferroic layers, that more ST circuits that are required in the ring to achieve the same sensor sensitivity. BDFO can be chosen for the multiferroic material. | 05-19-2016 |
Ankur Bulsara, Los Angeles, CA US
Patent application number | Description | Published |
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20100106705 | SOURCE CODE SEARCH ENGINE - In an embodiment, a method of operating a software search engine is provided. The method includes populating a software code database from one or more sources of source code. The method also includes receiving a search query for a software code search engine ( | 04-29-2010 |
Mayank Bulsara, Cambridge, MA US
Patent application number | Description | Published |
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20080265299 | Strained channel dynamic random access memory devices - DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined. | 10-30-2008 |
20120302032 | Methods for Forming Strained Channel Dynamic Random Access Memory Devices - DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined. | 11-29-2012 |
Mayank T. Bulsara, Cambridge, MA US
Patent application number | Description | Published |
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20130241035 | Strained Channel Dynamic Random Access Memory Devices - DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined. | 09-19-2013 |
20150060972 | Strained Channel Dynamic Random Access Memory Devices - DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined. | 03-05-2015 |
20150380414 | Strained Channel Dynamic Random Access Memory Devices - DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined. | 12-31-2015 |