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Budell
Timothy W. Budell, Essex Jct., VT US
| Patent application number | Description | Published |
|---|---|---|
| 20100332193 | Method of Multi-segments Modeling Bond Wire Interconnects with 2D Simulations in High Speed, High Density Wire Bond Packages - A method for modeling bond wires in an IC package for predicting noise effects generated by electromagnetic coupling in complex bond wire configurations. A look-up table of equivalent LC circuit models for the bond wires is generated that accurately predicts the effects of the bond wire circuitry of a signal transmission system. Switch and mirror techniques are applied to reduce the bond wire configurations necessary to simulate. The method includes: setting parameters related to the IC package layout of groups of bond wires; sub-dividing each group of bond wires into regions, each including a portion of the bond wire or its corresponding pad, and generating dissection planes for the regions consisting of the bond wires; performing a 3D simulation on the regions consisting of the corresponding pads, and a 2D simulation for each dissection plane; constructing equivalent circuit models for groups of bond wires and corresponding pads based on the 3D and 2D simulations results; inputting the equivalent circuit models into a circuit simulator to measure the noise effects; and modifying the layout geometry to meet noise targets. | 12-30-2010 |
Timothy W. Budell, Westford, VT US
| Patent application number | Description | Published |
|---|---|---|
| 20090094564 | METHOD FOR RAPID RETURN PATH TRACING - A method for quickly tracing minimum-length conductive return paths through an electronic structure utilizes a raster based (cellular) memory model comprising individual grids for each layer of the structure. Each grid comprises a reduced resolution N×M cell representation of the conductive structures on that layer. Cellular methodologies are then used to determine, for each signal net, the shortest return path. This information can then be used for various purposes, including determining if the return path is sufficient to ensure adequate signal integrity. | 04-09-2009 |
| 20090138836 | AUTOMATIC VERIFICATION OF ADEQUATE CONDUCTIVE RETURN-CURRENT PATHS - After finding the shortest conductive signal return-current path for each signal, the invention assesses whether each conductive return-current path is adequate. The method analyzes each shortest conductive signal return-current path and determines if a significant portion of the signal return current flows as displacement current rather than following the conductive current path. A significant displacement current flows when the length of the conductive return-current path that diverges from a signal net is more than a previously defined limit based on the signal transition time. Further, a significant displacement current flows when the overall length of the signal differs from the overall length of the conductive return-current path by more than a previously defined limit based on the signal transition time. | 05-28-2009 |
Timothy W. Budell, Milton, VT US
| Patent application number | Description | Published |
|---|---|---|
| 20080320424 | VALIDATION OF ELECTRICAL PERFORMANCE OF AN ELECTRONIC PACKAGE PRIOR TO FABRICATION - An electrical resistance determination method. Input to the method includes a description of at least one electrical network within a substrate. The description includes specification of a plurality of first ports on a first side of the substrate, and a plurality of second ports on a second side of the substrate, for each electrical network. All of the first ports are electrically isolated from one another. All of the second ports are electrically connected to a common voltage. A computer readable program code, which is executed by a processor of a computer system computes for a first electrical network of the at least one electrical network an electrical resistance between each first port and a port of the second ports. The computer code may also display a perspective plot of the computed electrical resistances as a bar oriented about normal to each first port. | 12-25-2008 |