Patent application number | Description | Published |
20090076518 | METHOD AND SYSTEM FOR STABILIZING ADJACENT VERTEBRAE - A method of stabilizing adjacent vertebrae including the steps of forming at least one annulotomy in an annulus. At least a portion of the nucleus material is removed through the annulotomy to form a cavity in an intervertebral disc space between the adjacent vertebrae. A reservoir containing a flowable biomaterial is fluidly coupled to the intervertebral disc space. A flowable biomaterial is delivered to the cavity. The delivery of the flowable biomaterial into the intervertebral disc space is controlled in accordance with at least a first operating parameter. The biomaterial is at least partially cured to stabilize the adjacent vertebrae. | 03-19-2009 |
20090078255 | Methods for pressure regulation in positive pressure respiratory therapy - Methods of positive pressure therapy are described. The methods increase the pressure delivered to a user from a sub-therapeutic pressure to a therapeutic pressure in one or more pressure steps sequenced to the user's breath intervals. | 03-26-2009 |
20090078258 | Pressure regulation methods for positive pressure respiratory therapy - Methods that may provide a positive pressure therapy to a user are described. The methods include detecting the user's breathing parameters and increasing the pressure delivered to the user from a sub-therapeutic pressure to a therapeutic pressure based upon the breathing parameters. | 03-26-2009 |
20100065054 | METHODS FOR BATTERY POWER MANAGEMENT OF POSITIVE AIRWAY PRESSURE APPARATUS - Methods relating to the power management of positive airway pressure apparatus using a battery are disclosed herein. The methods, in various aspects, are adapted to prolong the delivery of a positive airway pressurized therapy when the positive airway pressure apparatus is operated under battery power. | 03-18-2010 |
20120097156 | POSITIVE AIRWAY PRESSURE THERAPY MASK HUMIDIFICATION SYSTEMS AND METHODS - The present inventions provide positive airway pressure therapy apparatus to humidify the pressurized air delivered to a user during various positive airway pressure therapies and corresponding methods. The positive airway pressure therapy apparatus may be configured to administer one or more positive airway pressure therapies, including: continuous positive airway pressure therapy (CPAP), bi-level positive airway pressure therapy (BPAP), auto positive airway pressure therapy (autoPAP), proportional positive airway pressure therapy (PPAP), and/or other positive airway pressure therapies. | 04-26-2012 |
20120167879 | POSITIVE AIRWAY PRESSURE THERAPY APPARATUS AND METHODS - Embodiments of the invention are directed to positive airway pressure therapy apparatus and methods for using same. In some embodiments, the apparatus includes a body- (e.g., head-) mounted housing enclosing a blower, wherein the housing includes air inlets on multiple sides so that the blower may draw adequate air even when inlets on one side are obstructed. In another embodiment, the apparatus includes a mask or mask system securable to an airway of the user. The mask system may include a mask shell and two or more adapters configured to permit the attachment of two or more different mask seals to the same mask shell. Other embodiments of the invention describe strapping systems configured to removably attach the housing and the mask to the body. The apparatus may further include a drying mode that activates upon removal of the apparatus from the user. | 07-05-2012 |
20130098359 | NARES MASK AND SUPPORT APPARATUS - Embodiments of the present invention provide a nares mask and support apparatus (e.g., for use with a positive airway pressure therapy system) that may generate the desired mask retaining force while reducing or even eliminating the need for supplemental facial contact elements such as face-contacting straps or bands. The apparatus may include a first biasing element that biases a nares interface in a direction generally orthogonal to and towards the user's face. A second biasing element may bias the nares interface in a direction generally parallel to the face and towards the user's forehead. The biasing forces applied by the first and second biasing elements may thus produce a resultant force that biases the nares interface in a direction generally aligned with an axis of the nares. | 04-25-2013 |
20130109936 | MEDICAL SENSOR AND TECHNIQUE FOR USING THE SAME | 05-02-2013 |
20140014102 | METHODS FOR BATTERY POWER MANAGEMENT OF POSITIVE AIRWAY PRESSURE APPARATUS - Methods relating to the power management of positive airway pressure apparatus using a battery are disclosed herein. The methods, in various aspects, are adapted to prolong the delivery of a positive airway pressurized therapy when the positive airway pressure apparatus is operated under battery power. | 01-16-2014 |
20140330156 | APPARATUS AND METHOD FOR ADAPTING A PIEZOELECTRIC RESPIRATORY SENSING BELT TO A RESPIRATORY INDUCTANCE PLETHYSMOGRAPHY POLYSOMNOGRAPH - Circuits for rendering piezo-based respiratory belts compatible with polysomnograph (PSG) machines designed for use with respiratory induction belts (RIPs) comprise an instrumentation amplifier adapted to be connected to a piezoelectric transducer and providing an AC output signal to a low-pass filter. In a first embodiment, the low-pass filter output is applied to an input of a microcontroller's A to D converter and the resulting digitized samples are used to vary the resistance of a digital potentiometer whose wiper terminal is coupled in series with an inductor so as to emulate the presence of a RIP belt to the PSG machine. In a second embodiment, the low-pass filter output is used to drive the primary of a transformer so as to vary the permeability of the transformer's ferrite core in a way that emulates the performance of a RIP belt to the PSG. | 11-06-2014 |
Patent application number | Description | Published |
20100068523 | Surface modification of and dispersion of particles - A method provides a redispersible nanoparticle powder. The method includes:
| 03-18-2010 |
20100310719 | Manufacture of seed derivative compositions - A method is used to separate fractions from a seed. This can be done by:
| 12-09-2010 |
20110020519 | ENCAPSULATION OF OXIDATIVELY UNSTABLE COMPOUNDS - An encapsulated material is formed by congealing droplets of a molten blend of oxidatively unstable material and phytosterol in a chilling gas stream to form prilled cores containing oxidatively unstable material and phytosterol, and encapsulating the prilled cores in one or more protective shell layers to form free-flowing microparticles. | 01-27-2011 |
20110052680 | ENCAPSULATION OF OXIDATIVELY UNSTABLE COMPOUNDS - An encapsulated material containing an oxidation-sensitive core is covered by at least a dried phospholipid layer, and contains at least one phytosterol in the core, the phospholipid layer or in a further layer or layers. By using microencapsulation, oxidatively unstable materials may be provided with a synthetic protective barrier and rendered less susceptible to oxidative degradation. | 03-03-2011 |
20110059164 | ENCAPSULATION OF OXIDATIVELY UNSTABLE COMPOUNDS - An encapsulated material containing an oxidation-sensitive core is covered by at least a dried synthetic organelle layer and optional additional ingredients in the organelle layer or additional layers. By using microencapsulation to mimic or otherwise adapt the storage concepts used by seeds to protect triacylglycerol cores, oxidatively unstable materials may be provided with a synthetic, seed-like oxygen-resistant protective barrier and rendered less susceptible to oxidative degradation. | 03-10-2011 |
20110201841 | OXIDATIVE MONO-HALOGENATION OF METHANE - Oxidatively halogenate methane by placing a feedstream that comprises methane, a source of halogen, a source of oxygen and, optionally, a source of diluent gas in contact with a first catalyst (e.g. a solid super acid or a solid super base) that has greater selectivity to methyl halide and carbon monoxide than to methylene halide, trihalomethane or carbon tetrahalide. Improve overall selectivity to methyl halide by using a second catalyst that converts at least part of the feedstream to a mixture of methyl halide, methylene halide, trihalomethane, carbon tetrahalide and unreacted oxygen, and placing that mixture in contact with the first catalyst which converts at least a portion of the methylene halide, trihalomethane and carbon tetrahalide to carbon monoxide, hydrogen halide and water. | 08-18-2011 |
20120015093 | Whole seed processing and controlled viscosity products - A method provides a milled whole seed product from a whole seed having at least 0.01% by total weight of oil therein. The whole seed is added to an aqueous carrier which is physically milled at a shear rate of at least 3,000 r.p.m. The shearing is continued until at least 50% by weight of seed solids will pass through a square mesh screen having 1.2 mm screen hole dimensions. The solids in aqueous carrier is collected as a suspension or dispersion in the aqueous carrier. The collected seed solids in aqueous carrier are dried to form a free-flowing powder. The free-flowing powder is rehydrated with a second aqueous medium to form a non-mucilaginous suspension or dispersion. | 01-19-2012 |
20130079576 | CONVERSION OF METHYLAMINE TO OLEFIN OR MIXTURE OF OLEFINS - Convert a methylamine (e.g. monomethylamine, dimethylamine and trimethylamine) to a mixture of olefins (e.g. ethylene, propylene and butylene) by placing the methylamine, optionally in a mixture with at least one of ammonia and an inert diluent, in contact with a microporous acidic silicoaluminophosphate catalyst or a microporous aluminosilicate catalyst. | 03-28-2013 |
20130183432 | Manufacture of Seed Derivative Compositions - A method is used to separate fractions from a seed. This can be done by:
| 07-18-2013 |
Patent application number | Description | Published |
20120198312 | METHODS AND DEVICES TO INCREASE MEMORY DEVICE DATA RELIABILITY - A first data set is written to first memory units identified as having a higher data reliability and a second data set is written to second memory units identified as having a lower data reliability than the first memory units. In some cases, the second data set may include metadata or redundancy information that is useful to aid in reading and/or decoding the first data set. The act of writing the second data set increases the data reliability of the first data set. The second data set may be a null pattern, such as all erased bits. | 08-02-2012 |
20140071751 | SOFT ERASURE OF MEMORY CELLS - Apparatus and method for managing data in a memory, such as but not limited to a flash memory array. In accordance with some embodiments, a soft erasure is performed on a block of memory cells by toggling an erasure status value without otherwise affecting a written state of the cells in the block. The memory cells are subsequently overwritten with a set of data using a write polarity direction determined responsive to the toggled erasure status value. | 03-13-2014 |
20140119123 | FAULT TOLERANT CONTROL LINE CONFIGURATION - A fault tolerant control line configuration useful in a variety of solid state memories such as but not limited to a flash memory. In accordance with some embodiments, an apparatus includes a plurality of memory cells, and a fault tolerant control line. The control line has an elongated first conductive path connected to each of the plurality of memory cells. An elongated second conductive path is disposed in a parallel, spaced apart relation to the first conductive path. A plurality of conductive support members are interposed between the first and second conductive paths to support the second conductive path above the first conductive path. | 05-01-2014 |
20140129891 | METHODS AND DEVICES TO INCREASE MEMORY DEVICE DATA RELIABILITY - A first data set is written to first memory units identified as having a higher data reliability and a second data set is written to second memory units identified as having a lower data reliability than the first memory units. In some cases, the second data set may include metadata or redundancy information that is useful to aid in reading and/or decoding the first data set. The act of writing the second data set increases the data reliability of the first data set. The second data set may be a null pattern, such as all erased bits. | 05-08-2014 |
20140332748 | THREE DIMENSIONAL RESISTIVE MEMORY - A memory device includes a stack of layers comprising a plurality of alternating layers of continuous electrically conductive material word line layers with layers of continuous electrically insulating material. A plurality of vias vertically extend through the stack of layers and a vertical bit line is disposed within each via. A layer of switching material separates the vertical bit line from the stack of layers, thereby forming an array of RRAM cells. | 11-13-2014 |
20140334228 | LINEARLY RELATED THRESHOLD VOLTAGE OFFSETS - Threshold voltage offsets for threshold voltages are determined. The threshold voltage offsets may be linearly related by a non-zero slope. The threshold voltages are shifted using their respective threshold voltage offsets. The threshold voltages that are shifted by their respective threshold voltage offsets are used to read data from multi-level memory cells. | 11-13-2014 |
20140347923 | THRESHOLD VOLTAGE CALIBRATION USING REFERENCE PATTERN DETECTION - A memory controller identifies a predominant type of error of a memory unit of solid state memory cells. An error type differential is calculated. The error type differential is a difference between a number of charge loss errors and a number of charge gain errors of the memory unit. A V | 11-27-2014 |
20150023097 | PARTIAL REPROGRAMMING OF SOLID-STATE NON-VOLATILE MEMORY CELLS - Method and apparatus for managing data in a memory, such as a flash memory array. In accordance with some embodiments, data are written to a set of solid-state non-volatile memory cells so that each memory cell in the set is written to an associated initial programmed state. Drift in the programmed state of a selected memory cell in the set is detected, and the selected memory cell is partially reprogrammed to return the selected memory cell to the associated initial programmed state. | 01-22-2015 |
20150178148 | THRESHOLD VOLTAGE CALIBRATION USING REFERENCE PATTERN DETECTION - A memory controller identifies a predominant type of error of a memory unit of solid state memory cells. An error type differential is calculated. The error type differential is a difference between a number of charge loss errors and a number of charge gain errors of the memory unit. A V | 06-25-2015 |
20150179268 | Using Different Programming Modes to Store Data to a Memory Cell - Method and apparatus for managing data in a memory, such as a flash memory array. In accordance with some embodiments, a memory cell is provided with a plurality of available programming states to accommodate multi-level cell (MLC) programming. A control circuit stores a single bit logical value to the memory cell using single level cell (SLC) programming to provide a first read margin between first and second available programming states. The control circuit subsequently stores a single bit logical value to the memory cell using virtual multi-level cell (VMLC) programming to provide a larger, second read margin between the first available programming state and a third available programming state. | 06-25-2015 |
20150310937 | METHODS AND SYSTEMS INCLUDING AT LEAST TWO TYPES OF NON-VOLATILE CELLS - Methods and systems that include receiving data to be written to a NAND array in a controller; and writing the data to the NAND array, the NAND array including both type A NAND cells and type B NAND cells, wherein the type A NAND cells and the type B NAND cells have at least one structural difference. | 10-29-2015 |
20150310938 | Temperature Tracking to Manage Threshold Voltages in a Memory - Method and apparatus for managing data in a memory, such as a flash memory array. In accordance with various embodiments, a first data access operation is conducted on a memory cell and a first temperature associated with the memory cell and associated with the first data access operation is measured. A second temperature associated with the memory cell is measured. At least one operational parameter is adjusted responsive to the first and second temperatures associated with the memory cell. A second data access operation is conducted on the memory cell using the adjusted operational parameter. | 10-29-2015 |
Patent application number | Description | Published |
20100177551 | BIT SET MODES FOR A RESISTIVE SENSE MEMORY CELL ARRAY - Various embodiments of the present invention are generally directed to a method and apparatus for providing different bit set modes for a resistive sense memory (RSM) array, such as a spin-torque transfer random access memory (STRAM) or resistive random access memory (RRAM) array. In accordance with some embodiments, a group of RSM cells in a non-volatile semiconductor memory array is identified for application of a bit set operation. A bit set value is selected from a plurality of bit set values each separately writable to the RSM cells to place said cells in a selected resistive state. The selected bit set value is thereafter written to at least a portion of the RSM cells in the identified group. | 07-15-2010 |
20100177562 | COMPUTER MEMORY DEVICE WITH MULTIPLE INTERFACES - Various embodiments are generally directed to a method and apparatus associated with operating a first memory device with multiple interfaces and a status register. In some embodiments, a first interface is engaged by a host. A memory device that has a plurality of memory cells comprised of at least a magnetic tunneling junction and a spin polarizing magnetic material is connected to a second interface. A status register is maintained by logging at least an error or busy signal during data transfer operations through the first and second interfaces. | 07-15-2010 |
20100188883 | Simultaneously Writing Multiple Addressable Blocks of User Data to a Resistive Sense Memory Cell Array - Method and apparatus are disclosed for storing data to non-volatile resistive sense memory (RSM) memory cells of a semiconductor memory array, including but not limited to resistive random access memory (RRAM) and spin-torque transfer random access memory (STTRAM or STRAM) cells. In accordance with various embodiments, a plurality of addressable data blocks from a host device are stored in a buffer. At least a portion of each of the addressable data blocks are serially transferred to a separate register of a plurality of registers. The transferred portions of said addressable data blocks are thereafter simultaneously transferred from the registers to selected RSM cells of the array. | 07-29-2010 |
20120033482 | Bit Set Modes for a Resistive Sense Memory Cell Array - Various embodiments of the present invention are generally directed to a method and apparatus for providing different bit set modes for a resistive sense memory (RSM) array, such as a spin-torque transfer random access memory (STRAM) or resistive random access memory (RRAM) array. In accordance with some embodiments, a group of RSM cells in a non-volatile semiconductor memory array is identified for application of a bit set operation. A bit set value is selected from a plurality of bit set values each separately writable to the RSM cells to place said cells in a selected resistive state. The selected bit set value is thereafter written to at least a portion of the RSM cells in the identified group. | 02-09-2012 |