Bosshart, TX

Patrick Bosshart, Plano, TX US

Patent application number	Description	Published
20090167355	High performance pulsed buffer - An integrated circuit (	07-02-2009
20090167394	INTEGRATED CIRCUITS HAVING DEVICES IN ADJACENT STANDARD CELLS COUPLED BY THE GATE ELECTRODE LAYER - An integrated circuit (	07-02-2009
20090167395	HIGH PERFORMANCE LATCHES - An integrated circuit includes at least one latch circuit (	07-02-2009
20090167396	HIGH PERFORMANCE CLOCKED LATCHES AND DEVICES THEREFROM - An integrated circuit (	07-02-2009
20090265406	DECISION FEEDBACK EQUALIZER HAVING PARALLEL PROCESSING ARCHITECTURE - An integrated circuit includes a decision feedback equalizer (DFE) including a first and second digital equalizer logic including circuitry to compensate first and second bits in a received stream and to provide first and second sign bits. The second equalizer logic can run concurrently and can be connected in parallel relative to the first equalizer logic. The second equalizer logic can include a low and high sign bit pipelines providing first and second conditional sign bits by assuming a low and high sign bits, respectively, for a first bits being concurrently processed by the first equalizer logic and a sign bit selection element to select between the first and second conditional sign bits based on the sign bit outcome of the first equalizer logic. The first and second pipelines compensate bits using compensation weights chosen using most recent first and second conditional sign bits and sign bit outcome.	10-22-2009

Patent application number	Description	Published
20080219390	Receiver Circuit - A thermometer code to sign and magnitude converter that is particularly useful in a flash ADC is provided. This comprises two conversion units. The first is a thermometer code to Gray code converter and the second a Gray code to sign and magnitude converter. Preferably, the Gray code is of a kind that has a sign bit and has the other bits symmetrically disposed about zero. This form is easily converted to a sign and magnitude code, which is advantageous as it reduces the latency of the converter, which is particularly useful at high data rates.	09-11-2008
20090034311	LOW POWER TERNARY CONTENT-ADDRESSABLE MEMORY (TCAM) - An integrated circuit (	02-05-2009
20100163948	Integrated Circuit Having Efficiently Packed Decoupling Capacitors - An integrated circuit includes a substrate having a semiconducting surface (	07-01-2010

Patent applications by Patrick W. Bosshart, Plano, TX US