| Patent application number | Description | Published |
| 20080236877 | Power core devices and methods of making thereof - A device comprising a power core wherein said power core comprises: at least one embedded singulated capacitor wherein said embedded singulated capacitor comprises at least a first electrode and a second electrode and wherein said embedded singulated capacitor is positioned on the outer layer of the power core so that at least one Vcc (power) terminal and at least one Vss (ground) terminal of a semiconductor device can be directly connected to at least one first and at least one second electrode, respectively and wherein the first and second electrode of the singulated capacitor is interconnected to the first and second electrode respectively of an external planar capacitor embedded within a printed wiring motherboard. | 10-02-2008 |
| 20080316723 | METHODS FOR INTEGRATION OF THIN-FILM CAPACITORS INTO THE BUILD-UP LAYERS OF A PRINTED WIRING BOARD - Provided herein are devices comprising a printed wiring board that comprise, singulated capacitors fabricated from known good, thin-film, fired-on-foil capacitors. Provided are methods of incorporating the singulated capacitors into the build-up layers of a printed wiring board to minimize impedance. The singulated capacitors have a pitch that allows each power and ground terminal of an IC to be directly connected to a power and ground electrode, respectively, of its own singulated capacitor. Using a feedstock of known good, fired-on-foil capacitors allows for improved PWB yield. | 12-25-2008 |
| 20090140400 | Method of Mid-Frequency Decoupling - A printed wiring board semiconductor package or PWB power core comprising singulated capacitors embedded on multiple layers of the printed wiring board semiconductor package wherein at least a part of each embedded capacitor lies within the die shadow and wherein the embedded, singulated capacitors comprise at least a first electrode and a second electrode. The first electrodes and second electrodes of the embedded singulated capacitors are interconnected to the Vcc (power) terminals and the Vss (ground) terminals respectively of a semiconductor device. The size of the embedded capacitors are varied to produce different self-resonant frequencies and their vertical placements within the PWB semiconductor package are used to control the inherent inductance of the capacitor-semiconductor electrical interconnections so that customized resonant frequencies of the embedded capacitors can be achieved with low impedance. | 06-04-2009 |
| 20090238954 | LARGE AREA THIN FILM CAPACITORS ON METAL FOILS AND METHODS OF MANUFACTURING SAME - Disclosed are a method of making a dielectric on a metal foil, and a method of making a large area capacitor that includes a dielectric on a metal foil. A dielectric precursor layer and the base metal foil are prefired at a prefiring temperature in the range of 350 to 650° C. in a moist atmosphere that also comprises a reducing gas. The prefired dielectric precursor layer and base metal foil are subsequently fired at a firing temperature in the range of 700 to 1200° C. in an atmosphere having an oxygen partial pressure of less than about 10 | 09-24-2009 |
| Patent application number | Description | Published |
| 20080297274 | CAPACITIVE/RESISTIVE DEVICES, ORGANIC DIELECTRIC LAMINATES AND PRINTED WIRING BOARDS INCORPORATING SUCH DEVICES, AND METHODS OF MAKING THEREOF - This invention relates to a capacitive/resistive device, which may be embedded within a layer of a printed wiring board. Embedding the device conserves board surface real estate, and reduces the number of solder connections, thereby increasing reliability. More specifically, the device, comprises a first metallic foil; a second metallic foil; a first electrode formed from the first metallic foil; a dielectric disposed over the first electrode; a resistor element formed on and adjacent to the dielectric; a conductive trace; and a second electrode formed from the second metallic foil and disposed over the dielectric and in electrical contact with the resistor element, wherein the dielectric is disposed between the first electrode and the second electrode and wherein said dielectric comprises an unfilled polymer of dielectric constant less than 4.0. | 12-04-2008 |
| 20100037941 | COMPOSITIONS AND PROCESSES FOR FORMING PHOTOVOLTAIC DEVICES - Methods and compositions for making photovoltaic devices are provided. A metal that is reactive with silicon is placed in contact with the n-type silicon layer of a silicon substrate. The silicon substrate and reactive metal are fired to form a silicide contact to the n-type silicon layer. A conductive metal electrode is placed in contact with the silicide contact. A silicon solar cell made by such methods is also provided. | 02-18-2010 |
| 20100037942 | COMPOSITIONS AND PROCESSES FOR FORMING PHOTOVOLTAIC DEVICES - Photovoltaic cells, including silicon solar cells, and methods and compositions for making such photovoltaic cells are provided. A silicon substrate having an n-type silicon layer is provided with a silicon nitride layer, a reactive metal in contact with said silicon nitride layer, and a non-reactive metal in contact with the reactive metal. This assembly is fired to form a low Shottky barrier height contact comprised of metal nitride, and optionally metal silicide, on the silicon substrate, and a conductive metal electrode in contact with said low Shottky barrier height contact. The reactive metal may be titanium, zirconium, hafnium, vanadium, niobium, and tantalum, and combinations thereof, and the non-reactive metal may be silver, tin, bismuth, lead, antimony, arsenic, indium, zinc, germanium, nickel, phosphorus, gold, cadmium, berrylium, and combinations thereof. | 02-18-2010 |
| 20100037951 | MULTI-ELEMENT METAL POWDERS FOR SILICON SOLAR CELLS - Disclosed are methods of making multi-element, finely divided, metal powders containing one or more reactive metals and one or more non-reactive metals. Reactive metals include metals or mixtures thereof from titanium (Ti), zirconium (Zr), hafnium (Hf), tantalum (Ta), niobium (Nb), vanadium (V), nickel (Ni), cobalt (Co), molybdenum (Mo), manganese (Mn), and iron (Fe). Non-reactive metals include metals or mixtures such as silver (Ag), tin (Sn), bismuth (Bi), lead (Pb), antimony (Sb), zinc (Zn), germanium (Ge), phosphorus (P), gold (Au), cadmium (Cd), berrylium (Be), tellurium (Te). | 02-18-2010 |
| 20100073845 | THIN FILM CAPACITORS ON METAL FOILS AND METHODS OF MANUFACTURING SAME - Disclosed are methods of making a dielectric on a metal foil, and a method of making a large area capacitor that includes a dielectric on a metal foil. A first dielectric layer is formed over the metal foil by physical vapor deposition, and a dielectric precursor layer is formed over the first dielectric layer by chemical solution deposition. The metal foil, first dielectric layer and dielectric precursor layer are prefired at a prefiring temperature in the range of 350 to 650° C. The prefired dielectric precursor layer, the first dielectric layer and the base metal foil are subsequently fired at a firing temperature in the range of 700 to 1200° C. | 03-25-2010 |
| 20100154875 | COMPOSITIONS AND PROCESSES FOR FORMING PHOTOVOLTAIC DEVICES - Photovoltaic cells, including silicon solar cells, and methods and compositions for making such photovoltaic cells are provided. A silicon substrate having p-type silicon base and an n-type silicon layer is provided with a silicon nitride layer, an exchange metal in contact with the silicon nitride layer, and a non-exchange metal in contact with the exchange metal. This assembly is fired to form a metal silicide contact on the silicon substrate, and a conductive metal electrode in contact with the metal silicide contact. The exchange metal is from nickel, cobalt, iron, manganese, molybdenum, and combinations thereof, and the non-exchange metal is from silver, copper, tin, bismuth, lead, antimony, arsenic, indium, zinc, germanium, gold, cadmium, berrylium, and combinations thereof. | 06-24-2010 |