Boo-Jin
Boo-Jin Kim, Suwon-Si KR
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20110245946 | LOW POWER AUDIO PLAY DEVICE AND METHOD - A low power audio play device, including an audio processing unit configured to decode requested audio data, the audio processing unit buffering decoded requested audio data as buffered data, and an audio output unit configured to play the buffered data when the buffered data in the audio processing unit are more than a predetermined amount, wherein a supply of power to hardware is configured to be cut off, except for power supplied to the audio output unit, while the buffered data are played. | 10-06-2011 |
20130061033 | DATA PROCESSING SYSTEM AND METHOD FOR SWITCHING BETWEEN HETEROGENEOUS ACCELERATORS - A method for operating a system on chip includes receiving an acceleration request signal generated upon execution of an application program, in response to receipt of the acceleration request signal, comparing a current usage of a central processing unit (CPU) with a threshold value to generate a comparison signal, and performing switching between heterogeneous accelerators to accelerate a function executed by the application program in response to the comparison signal. | 03-07-2013 |
Boo-Jin Kim, Seoul KR
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20120216064 | HOT-PLUGGING OF MULTI-CORE PROCESSOR - A method of hot-plugging a multi-core processor comprises monitoring respective workload levels of multiple processor cores, hot-plugging off a first core among the processor cores upon determining that its workload level has fallen below a lower reference value, and hot-plugging on a second core among the processor cores upon determining that its workload level has risen above an upper reference value while the first core is hot-plugged off. | 08-23-2012 |
Boo-Jin Kim, Gunpo-Si KR
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20130262894 | SYSTEM-ON-CHIP, ELECTRONIC SYSTEM INCLUDING SAME, AND METHOD CONTROLLING SAME - A system-on-chip (SoC) operates with a memory device and includes a performance monitoring unit (PMU) that measures memory usage for the memory device, and a central processing unit (CPU) configured to implement a dynamic voltage frequency scaling (DVFS) controller that compares the memory usage during a performance monitoring period with a reference value and selects a control scheme accordingly. | 10-03-2013 |
20140215177 | Methods and Systems for Managing Heterogeneous Memories - A system includes a processor and first and second memories coupled to the processor. The first and second memories have a hardware attribute, such as bandwidth, latency and/or power consumption, wherein a first value of the hardware attribute of the first memory is different from a second value of the hardware attribute of the second memory. The system further includes a memory management module configured to receive a memory allocation request. The memory management module is configured to allocate memory space in the first memory or the second memory in response to the memory allocation request based on the values of the hardware attribute of the first memory and the second memory. | 07-31-2014 |