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Bonwick

Jeffrey S. Bonwick, Los Altos, CA US

Patent application numberDescriptionPublished
20090313532METHOD AND SYSTEM FOR DATA REPLICATION - A method for writing data to a storage pool includes receiving a write operation to write a logical block of data to the storage pool, determining a number (n−1) of physical blocks required to store the logical block of data, generating a parity block using the logical block of data, allocating n physical blocks in the storage pool, writing the parity block in the first of n allocated physical block, and writing the logical block of data across the remaining n−1 allocated physical blocks, where n is less than a number of disks in the storage pool, and where each of the n allocated physical blocks is located on a different disk in the storage pool.12-17-2009
20100145919METHOD AND SYSTEM FOR PRUNED RESILVERING USING A DIRTY TIME LOG - A computer readable medium includes executable instructions for resilvering a hierarchical block tree in a storage pool by traversing a branch of the hierarchical block tree only if a birth time of a parent block of the branch is greater than or equal to a lowest birth time on a dirty time log (DTL), and resilvering a child block in the branch only if the DTL comprises a birth time of the child block.06-10-2010
20110283113METHOD AND SYSTEM FOR ENCRYPTING DATA - A processing device may generate a data encryption key configured to encrypt unique data within a clone of an encrypted data set and associated with a set of transaction identifiers of a transaction based file system. The processing device may further wrap the data encryption key with a wrapping key, create a cloned encrypted data set with the data encryption key, and store the wrapped data encryption key with the cloned encrypted data set indexed by at least one of the set of transaction identifiers.11-17-2011
20110320649WRITE AGGREGATION USING OPTIONAL I/O REQUESTS - A computer readable storage medium comprising software instructions, which when executed by a processor, perform a method, the method including obtaining a first non-optional Input/Output (I/O) request from an I/O queue, determining that a second non-optional I/O request and an optional I/O request are adjacent to the first non-optional I/O request, generating a new data payload using a first data payload from the first non-optional I/O request, a second data payload for the second non-optional I/O request, and a third data payload corresponding to the optional I/O request, wherein the third data payload is interposed between the first data payload and the second data payload, generating a new non-optional I/O request comprising the new data payload, and issuing the new non-optional I/O request to a storage pool, wherein the new data payload is written to a contiguous storage location in the storage pool.12-29-2011

Patent applications by Jeffrey S. Bonwick, Los Altos, CA US

Paul Bonwick, Temple Quay GB

Patent application numberDescriptionPublished
20100117681METHOD AND APPARATUS FOR SAFE POWER UP OF PROGRAMMABLE INTERCONNECT - A method and apparatus for connecting a load track (05-13-2010

Paul Bonwick, Wiltshire GB

Patent application numberDescriptionPublished
20080309417RING OSCILLATOR - A ring oscillator comprises a first logic block having a first input connected to a specific point along a delay path, a first output and a second output and a second logic block having a first input connected to the first output of the first logic block, a second input connected to the second output of the first logic block, a third input connected to the end of the delay path and a first output connected to the beginning of the delay path. The first logic block is arranged to, in use, alternately switch its first output and second output from logical HIGH to logical LOW, and vice versa, every time a rising edge is input into its first input. The second logic block is arranged to, in use, alternately select its first input and its second input every time a rising edge is input into its third input. The pulse width of the signal output from the first output of the second logic block is indicative of the time necessary for one of a rising edge or a falling edge to propagate from the beginning of the delay path to the specific point along the delay path and the inverse pulse width of the signal output from the first output of the second logic block is indicative of the time necessary for the one of the rising edge or the falling edge respectively to propagate from specific point along the delay path to the end of the delay path.12-18-2008

Paul Bonwick, Bristol GB

Patent application numberDescriptionPublished
20120081148PROGRAMMABLE LOGIC DEVICE - A programmable logic device includes a plurality of repeating units, each of which includes interconnecting lines, a logic block comprising logic circuits, and a configuration memory block including a plurality of configuration memory circuits. One of the plurality of repeating units includes: a selection device coupled to output data of the plurality of configuration memory circuits and a shift chain segment input; and a flip flop receiving output of the selection device to output a shift chain segment output.04-05-2012