Bonghyun
Bonghyun Choi, Yongin-Si KR
Patent application number | Description | Published |
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20080284006 | Semiconductor devices including interlayer conductive contacts and methods of forming the same - In a semiconductor device and a method of forming the same, the semiconductor device comprises: a first insulating layer on an underlying contact region of the semiconductor device, the first insulating layer having an upper surface; a first conductive pattern in a first opening through the first insulating layer, an upper portion of the first conductive pattern being of a first width, an upper surface of the first conductive pattern being recessed relative to the upper surface of the first insulating layer so that the upper surface of the first conductive pattern has a height relative to the underlying contact region that is less than a height of the upper surface of the first insulating layer relative to the underlying contact region; and a second conductive pattern contacting the upper surface of the first conductive pattern, a lower portion of the second conductive pattern being of a second width that is less than the first width. | 11-20-2008 |
20110097895 | SEMICONDUCTOR DEVICES INCLUDING INTERLAYER CONDUCTIVE CONTACTS AND METHODS OF FORMING THE SAME - In a semiconductor device and a method of forming the same, the semiconductor device comprises: a first insulating layer on an underlying contact region of the semiconductor device, the first insulating layer having an upper surface; a first conductive pattern in a first opening through the first insulating layer, an upper portion of the first conductive pattern being of a first width, an upper surface of the first conductive pattern being recessed relative to the upper surface of the first insulating layer so that the upper surface of the first conductive pattern has a height relative to the underlying contact region that is less than a height of the upper surface of the first insulating layer relative to the underlying contact region; and a second conductive pattern contacting the upper surface of the first conductive pattern, a lower portion of the second conductive pattern being of a second width that is less than the first width. | 04-28-2011 |
Bonghyun Kim, Incheon KR
Patent application number | Description | Published |
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20120100687 | METHODS FOR FABRICATING CAPACITOR AND METHODS FOR FABRICATING SEMICONDUCTOR DEVICE INCLUDING THE CAPACITOR - Example embodiments relate to methods for fabricating a capacitor and methods for fabricating a semiconductor device including the capacitor. The methods for fabricating a capacitor may include forming a preliminary lower electrode with a first area on a substrate; implanting ions in the preliminary lower electrode to form a lower electrode with a second area that is larger or substantially larger than the first area; and forming a dielectric layer and an upper electrode on the lower electrode. | 04-26-2012 |
20120329252 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device may include a semiconductor substrate with an active region, a gate line disposed on the active region, an epitaxial pattern disposed on the semiconductor substrate beside the gate line, the epitaxial pattern including a semiconductor material different from the semiconductor substrate, and a capping pattern disposed on the epitaxial pattern. The capping pattern may improve contact with contact plug and may reduce variation in mean ion depths of an associated field effect transistor. | 12-27-2012 |
20130171807 | METHODS OF FABRICATING A SEMICONDUCTOR DEVICE INCLUDING DUAL TRANSISTORS - Provided are a semiconductor device having dual transistors, and methods of fabricating a semiconductor device, including sequentially forming an insulating layer and a polysilicon layer on a substrate having a first region and a second region, forming a first mask to cover the polysilicon layer on the second region, injecting at least one n-type impurity into the polysilicon layer on the first region to form an N-region, injecting nitrogen into the N-region, forming a second mask to cover the N-region, and injecting at least one p-type impurity into the polysilicon layer on the second region to form a P-region. | 07-04-2013 |
20140077294 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - Provided are a semiconductor device and a method of fabricating the same. The semiconductor device comprises a first trench formed in a substrate; a first insulating film formed on sidewalls and a bottom surface of the first trench and not formed on a top surface of the substrate; and a first conductive film formed on the first insulating film to partially fill the first trench, wherein the first insulating film comprises a first portion which overlaps the first conductive film and a second portion which does not overlap the first conductive film, wherein the second portion comprises first fixed charges. | 03-20-2014 |
Bonghyun Lee, Suwon-Si KR
Patent application number | Description | Published |
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20150371926 | INTEGRATED CIRCUIT HAVING MAIN ROUTE AND DETOUR ROUTE FOR SIGNAL TRANSMISSION AND INTEGRATED CIRCUIT PACKAGE INCLUDING THE SAME - The integrated circuit includes first and second vias, a first buffer configured to receive a signal transmitted from the first via, a second buffer configured to receive a signal transmitted from the second via, a first detour circuit configured to receive a signal transmitted through the second buffer, a second detour circuit configured to receive a signal transmitted through the first buffer, a first selector configured to selectively output one of the signal transmitted from the first via and a signal transmitted through the first detour circuit, and a second selector configured to selectively output one of the signal transmitted from the second via and a signal transmitted through the second detour circuit. Each of the first and second buffers and the first and second detour circuits transmits a signal in only one direction. | 12-24-2015 |