Patent application number | Description | Published |
20090034531 | Host device interfacing with a point of deployment (POD) and a method of processing broadcast data - A host device interfacing with a point of deployment (POD) and method of processing broadcasting data are disclosed. An IP physical interface unit receives a frame including an internet protocol (IP) packet carrying broadcast data through a network modem. A routing engine routs the frame based on a destination information included in the frame. An IP to TS Decapsulator extracts a MPEG-2 TS packet from the IP packet included in the routed frame. And a multiplexer augments the extracted MPEG-2 TS packet with Packet Header carrying an identification information, multiplexes the augmented MPEG-2 TS packet and forwards the multiplexed MPEG-2 TS to the POD. | 02-05-2009 |
20090055544 | Broadcasting receiver and method of interfacing resource information between a host device and a POD, sending host device resource information and obtaining host device resource information - A broadcasting receiver and method of interfacing resource information between a host device and a POD, sending host device resource information and obtaining host device resource information are disclosed. A POD sends a resource information requesting message. And a host device receives the resource information requesting message and responds with a resource information message including a resource identifier defined in a resource information table which includes information indicating whether the host device supports A-mode. Using a “conditional access” feature provided by a conventional cable security card, content received through any type of transport protocol (including an IP protocol) including a wired/wireless network can be protected and A-mode resource information can be systematically defined together with other-mode IP communication resource and the resource information of different modes can be integrated and transmitted to the host device. | 02-26-2009 |
20090079942 | Automatic Vision Display Apparatus Using Pursuit of Flying Path of Flying Screen Unit - An automatic vision display apparatus has a flight object having a floating gas filled therein to fly, flying along a vertical wall surface and including a screen mounted at an opposite side to the vertical wall surface; a propulsion unit mounted at a predetermined position of the flight object and moving the flight object; a control unit mounted to the flight object and controlling the propulsion unit; a projector projecting an image on the screen of the flight object at a distance from the flight object; an adjusting unit adjusting an image projecting direction of the projector; and a main control unit controlling the projector to project the image and controlling the adjusting unit so that the projector tracks a movement of the flight object to project an image. According to the invention, it is possible to project an image while automatically tracking the screen of the flight object being flying. In addition, it is possible to correct a distortion of the projected when the screen of the flight object consists of the three dimensional curved surface. | 03-26-2009 |
20110138164 | DIGITAL BROADCAST RECEIVER AND BOOTING METHOD OF DIGITAL BROADCAST RECEIVER - A digital broadcast receiver and a booting method of the digital broadcast receiver are disclosed herein. A method of secure booting of a system in a digital broadcast receiver comprises aligning a plurality of interleaved portions to generate a digital signature, respectively, with an entire firmware image, generating a digital signature of each interleaved portion, selecting a specific interleaved portion, generating a first message digest to read a region of the selected interleaved portion in the entire firmware image and a second message digest from the digital signature of the selected interleaved portion and verifying the firmware image based on the first and second message digest and booting the system in the digital broadcast receiver. | 06-09-2011 |
20120066710 | BROADCASTING RECEIVER AND METHOD OF INTERFACING RESOURCE INFORMATION BETWEEN A HOST DEVICE AND A POD, SENDING HOST DEVICE RESOURCE INFORMATION AND OBTAINING HOST DEVICE RESOURCE INFORMATION - A broadcasting receiver and method of interfacing resource information between a host device and a POD, sending host device resource information and obtaining host device resource information are disclosed. A POD sends a resource information requesting message. And a host device receives the resource information requesting message and responds with a resource information message including a resource identifier defined in a resource information table which includes information indicating whether the host device supports A-mode. Using a “conditional access” feature provided by a conventional cable security card, content received through any type of transport protocol (including an IP protocol) including a wired/wireless network can be protected and A-mode resource information can be systematically defined together with other-mode IP communication resource and the resource information of different modes can be integrated and transmitted to the host device. | 03-15-2012 |
Patent application number | Description | Published |
20140246079 | SOLAR CELL MODULE AND METHOD OF FABRICATING THE SAME - Disclosed are a solar cell module and a method of fabricating the same. The solar cell module includes a substrate, a solar cell panel located on the substrate and including a plurality of solar cells, a buffer sheet on the solar cell panel, and a bus bar connected to one of the solar cells while passing through the buffer sheet. The method of fabricating a solar cell module includes forming a solar cell panel including a plurality of solar cells on a substrate, forming a buffer sheet including a bus bar connected to one of the solar cells, and locating the buffer sheet including the bus bar on the solar cell panel. The bus bar passes through the buffer sheet. | 09-04-2014 |
20140246091 | SOLAR CELL MODULE APPARATUS AND METHOD OF FABRICATING THE SAME - Disclosed are a solar cell module apparatus and a method of fabricating the same. The solar cell module apparatus includes a light absorbing layer, and a reflector provided on a light incident surface of the light absorbing layer to reflect a light, which has been reflected from the light absorbing layer, toward the light absorbing layer. | 09-04-2014 |
20140311548 | SOLAR CELL MODULE - A solar cell module according to an embodiment includes a support substrate; a solar cell on the support substrate; and a bus bar on the solar cell, wherein the bus bar is prepared as a plurality of rods. | 10-23-2014 |
Patent application number | Description | Published |
20120007258 | SEMICONDUCTOR DEVICE WITH SIDE-JUNCTION AND METHOD FOR FABRICATING THE SAME - A method for fabricating a semiconductor device includes forming a plurality of bodies that are each isolated from another by a trench and each include a diffusion barrier region with a sidewall exposed to the trench, forming a doped layer gap-filling the trench, forming a sidewall junction at the exposed sidewall of the diffusion barrier region by annealing the doped layer, and forming a conductive line coupled with the sidewall junction to fill the trench. | 01-12-2012 |
20120302047 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH PARTIALLY OPEN SIDEWALL - A method for fabricating a semiconductor device includes forming a structure having first surfaces at a height above a second surface, which is provided between the first surfaces, forming a first silicon layer on the structure, performing a tilt ion implantation process on the first silicon layer to form a crystalline region and an amorphous region, forming a second silicon layer on the amorphous region, removing the second silicon layer and the first silicon layer until a part of the second surface is exposed, thereby forming an etch barrier, and etching using the etch barrier to form an open part that exposes a part of a sidewall of the structure. | 11-29-2012 |
20130134508 | SEMICONDUCTOR DEVICE WITH SIDE-JUNCTION AND METHOD FOR FABRICATING THE SAME - A method for fabricating a semiconductor device includes forming a plurality of bodies that are each isolated from another by a trench and each include a diffusion barrier region with a sidewall exposed to the trench, forming a doped layer gap-filling the trench, forming a sidewall junction at the exposed sidewall of the diffusion barrier region by annealing the doped layer, and forming a conductive line coupled with the sidewall junction to fill the trench. | 05-30-2013 |
20130161832 | SEMICONDUCTOR DEVICE WITH BURIED BIT LINE AND METHOD FOR FABRICATING THE SAME - A semiconductor device includes: a punch stop region formed in a substrate; a plurality of buried bit lines formed over the substrate; a plurality of pillar structures formed over the buried bit lines; a plurality of word lines extending to intersect the buried bit lines and being in contact with the pillar structures; and an isolation layer isolating the word lines from the buried bit lines. | 06-27-2013 |
20130240957 | METHOD OF FORMING GATE DIELECTRIC LAYER AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device includes ion-implanting germanium into a monocrystalline silicon-containing substrate; forming a gate oxide layer over a surface of the monocrystalline silicon-containing substrate and forming, under the gate oxide layer, a germanium-rich region in which the germanium is concentrated, by performing a plasma oxidation process; and crystallizing the germanium-rich region by performing an annealing process. | 09-19-2013 |
20140203337 | METHOD OF FORMING GATE DIELECTRIC LAYER AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device includes ion-implanting germanium into a monocrystalline silicon-containing substrate; forming a gate oxide layer over a surface of the monocrystalline silicon-containing substrate and forming, under the gate oxide layer, a germanium-rich region in which the germanium is concentrated, by performing a plasma oxidation process; and crystallizing the germanium-rich region by performing an annealing process. | 07-24-2014 |
20140232014 | SEMICONDUCTOR DEVICE WITH BURIED BIT LINE AND METHOD FOR FABRICATING THE SAME - A semiconductor device includes: a punch stop region formed in a substrate; a plurality of buried bit lines formed over the substrate; a plurality of pillar structures formed over the buried bit lines; a plurality of word lines extending to intersect the buried bit lines and being in contact with the pillar structures; and an isolation layer isolating the word lines from the buried bit lines. | 08-21-2014 |
Patent application number | Description | Published |
20100224939 | SEMICONDUCTOR DEVICE - Provided is a metal-oxide semiconductor (MOS) transistor containing a metal gate pattern. The semiconductor device includes a p-channel metal-oxide semiconductor (PMOS) transistor including a semiconductor substrate, a first insulating film formed on the semiconductor substrate, a first metal gate conductive film formed on the first insulating film, and a nitrogen diffusion blocking film formed between the first insulating film and the first metal gate conductive film, and an n-channel metal-oxide semiconductor (NMOS) transistor including the semiconductor substrate, a second insulating film formed on the semiconductor substrate, a second metal gate conductive film formed on the second insulating film, and a reaction blocking film formed of metal nitride and formed between the second insulating film and the second metal gate conductive film. According to the inventive concept, a reaction between a metal gate film and an insulating film may be minimized so as to result in a highly reliable MOS transistor. | 09-09-2010 |
20140061814 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device comprises: a semiconductor substrate comprising a first region and a second region; and first and second transistors on the first and second regions, respectively, wherein the first transistor comprises a first gate insulating layer pattern, the second transistor comprises a second gate insulating layer pattern, the first and second transistors both comprise a work function adjustment film pattern and a gate metal pattern, wherein the work function adjustment film pattern of the first transistor comprises the same material as the work function adjustment film pattern of the second transistor and the gate metal pattern of the first transistor comprises the same material as gate metal pattern of the second transistor, and a concentration of a metal contained in the first gate insulating layer pattern to adjust a threshold voltage of the first transistor is different from a concentration of the metal contained in the second gate insulating layer pattern to adjust a threshold voltage of the second transistor. | 03-06-2014 |