Patent application number | Description | Published |
20110133193 | THIN FILM TRANSISTOR SUBSTRATE AND THE METHOD THEREOF - A thin film transistor array panel includes a gate line, a gate insulating layer that covers the gate line, a semiconductor layer that is disposed on the gate insulating layer, a data line and drain electrode that are disposed on the semiconductor layer, a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode, and a pixel electrode that is electrically connected to the drain electrode through the contact hole. The data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, and the lower layer is wider than the upper layer, and the lower layer has a region that is exposed. The gate insulating layer may have a step shape. | 06-09-2011 |
20110204370 | Thin-Film Transistor Substrate, Method of Manufacturing the Same, and Display Device Including the Same - Provided are a thin-film transistor (TFT) substrate, a method of manufacturing the same, and a display device including the same. The TFT substrate includes a gate electrode formed on a substrate, a gate insulating layer formed on the gate electrode, an oxide semiconductor pattern formed on the gate insulating layer, a source electrode formed on the oxide semiconductor pattern, a drain electrode formed on the oxide semiconductor pattern to face the source electrode, and a pixel electrode formed on the gate insulating layer. | 08-25-2011 |
20110226727 | ETCHANT FOR METAL WIRING AND METHOD FOR MANUFACTURING METAL WIRING USING THE SAME - Exemplary embodiments of the present invention provide a metal wiring etchant. A metal wiring etchant according to an exemplary embodiment of the present invention includes ammonium persulfate, an organic acid, an ammonium salt, a fluorine-containing compound, a glycol-based compound, and an azole-based compound. | 09-22-2011 |
20120064678 | MANUFACTURING METHOD OF THIN FILM TRANSISTOR ARRAY PANEL - A method for manufacturing a TFT array panel includes forming a photosensitive film pattern with first and second parts in first and second sections on a metal layer, etching the metal layer of a third section using the film pattern as a mask to form first and second metal patterns, etching the film pattern to remove the first part, etching first and second amorphous silicon layers of the third section using the second part as a mask to form an amorphous silicon pattern and a semiconductor, etching the first and second metal patterns of the first section using the second part as a mask to form a source electrode and a drain electrode including an upper layer and a lower layer, and etching the amorphous silicon pattern of the region corresponding to the first section by using the second part as a mask to form an ohmic contact. | 03-15-2012 |
20120135555 | METHOD FOR MANUFACTURING THIN FILM TRANSISTOR ARRAY PANEL - A method for manufacturing a thin film transistor array panel, including: sequentially forming a first silicon layer, a second silicon layer, a lower metal layer, and an upper metal layer on a gate insulating layer and a gate line; forming a first film pattern on the upper metal layer; forming a first lower metal pattern and a first upper metal pattern that includes a protrusion, by etching the upper metal layer and the lower metal layer; forming first and second silicon patterns by etching the first and second silicon layers; forming a second film pattern by ashing the first film pattern; forming a second upper metal pattern by etching the first upper metal pattern; forming a data line and a thin film transistor by etching the first lower metal pattern and the first and second silicon patterns; and forming a passivation layer and a pixel electrode on the resultant. | 05-31-2012 |
20130017636 | COMPOSITION FOR REMOVING A PHOTORESIST AND METHOD OF MANUFACTURING A THIN-FILM TRANSISTOR SUBSTRATE USING THE COMPOSITIONAANM KIM; Bong-KyunAACI Hwaseong-siAACO KRAAGP KIM; Bong-Kyun Hwaseong-si KRAANM CHOI; Shin-IlAACI Hwaseong-siAACO KRAAGP CHOI; Shin-Il Hwaseong-si KRAANM PARK; Hong-SickAACI Suwon-siAACO KRAAGP PARK; Hong-Sick Suwon-si KRAANM LEE; Wang-WooAACI Suwon-siAACO KRAAGP LEE; Wang-Woo Suwon-si KRAANM JANG; Seok-JunAACI Asan-siAACO KRAAGP JANG; Seok-Jun Asan-si KRAANM KIM; Byung-UkAACI Hwaseong-siAACO KRAAGP KIM; Byung-Uk Hwaseong-si KRAANM PARK; Sun-JooAACI Pyeongtaek-siAACO KRAAGP PARK; Sun-Joo Pyeongtaek-si KRAANM YOON; Suk-IlAACI Suwon-siAACO KRAAGP YOON; Suk-Il Suwon-si KRAANM JEONG; Jong-HyunAACI SeoulAACO KRAAGP JEONG; Jong-Hyun Seoul KRAANM HUR; Soon-BeomAACI Anyang-siAACO KRAAGP HUR; Soon-Beom Anyang-si KR - A composition for removing a photoresist, the composition including about 1% by weight to about 10% by weight of tetramethyl ammonium hydroxide (“TMAH”), about 1% by weight to about 10% by weight of an alkanol amine, about 50% by weight to about 70% by weight of a glycol ether compound, about 0.01% by weight to about 1% by weight of a triazole compound, about 20% by weight to about 40% by weight of a polar solvent, and water, each based on a total weight of the composition. | 01-17-2013 |
20130115727 | ETCHING COMPOSITION AND METHOD OF MANUFACTURING A DISPLAY SUBSTRATE USING THE SYSTEM - An etching composition and a method of manufacturing a display substrate using the etching composition are disclosed. The etching composition includes phosphoric acid (H | 05-09-2013 |
20130115733 | ETCHANT COMPOSITION AND METHOD FOR MANUFACTURING THIN FILM TRANSISTOR USING THE SAME - Provided is an etchant composition. The etchant composition according to an exemplary embodiment of the present invention includes ammonium persulfate ((NH | 05-09-2013 |
20130115770 | ETCHING COMPOSITION, METHOD OF FORMING A METAL PATTERN AND METHOD OF MANUFACTURING A DISPLAY SUBSTRATE - An etching composition for a copper-containing layer includes about 0.1% to about 30% by weight of ammonium persulfate, about 0.1% to about 10% by weight of a sulfate, about 0.01% to about 5% by weight of an acetate and about 55% to about 99.79% by weight of water. The etching composition having improved stability during storage and an increased capacity for etching | 05-09-2013 |
20130178010 | METHOD OF FORMING A METAL PATTERN AND METHOD OF MANUFACTURING A DISPLAY SUBSTRATE - A method of forming a metal pattern is provided. In the method, a first titanium layer, a copper layer and a second titanium layer are sequentially formed on a substrate. A photo pattern is formed on the second titanium layer. The first titanium layer, the copper layer and the second titanium layer are patterned using the photo pattern to form a first titanium pattern, a copper pattern formed on the first titanium pattern and a second titanium pattern formed on the copper pattern. Therefore, a fine metal pattern may be formed. | 07-11-2013 |
20130183822 | THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING TRENCH, METAL WIRE, AND THIN FILM TRANSISTOR ARRAY PANEL - The present invention relates to a method for forming a trench that can remove residual particles in a trench using a metal mask, a method for forming a metal wire, and a method for manufacturing a thin film transistor array panel. The method for forming a trench includes: forming a first insulating layer on a substrate; forming a first metal layer on the first insulating layer; forming an opening by patterning the first metal layer; forming a trench by dry-etching the first insulating layer using the patterned first metal layer as a mask; and wet-etching the substrate. The dry-etching is performed using a main etching gas and a first auxiliary etching gas, and the first auxiliary etching gas includes argon. | 07-18-2013 |
20130234124 | THIN-FILM TRANSISTOR SUBSTRATE, METHOD OF MANUFACTURING THE SAME, AND DISPLAY DEVICE INCLUDING THE SAME - Provided are a thin-film transistor (TFT) substrate, a method of manufacturing the same, and a display device including the same. The TFT substrate includes a gate electrode formed on a substrate, a gate insulating layer formed on the gate electrode, an oxide semiconductor pattern formed on the gate insulating layer, a source electrode formed on the oxide semiconductor pattern, a drain electrode formed on the oxide semiconductor pattern to face the source electrode, and a pixel electrode formed on the gate insulating layer. | 09-12-2013 |
20130277666 | THIN FILM TRANSISTOR, THIN FILM TRANSISTOR ARRAY PANEL, AND METHOD OF MANUFACTURING A THIN FILM TRANSISTOR ARRAY PANEL - A thin film transistor array panel according to an exemplary embodiment of the invention includes: a substrate; a gate line positioned on the substrate and including a gate electrode; a gate insulating layer positioned on the gate line; an oxide semiconductor layer positioned on the substrate; a source electrode and a drain electrode positioned on the oxide semiconductor layer; a first insulating layer positioned on the source electrode and the drain electrode and including a first contact hole; a data line positioned on the first insulating layer and intersecting the gate line; and a pixel electrode over the first insulating layer. The source electrode and the drain electrode each comprise a metal oxide. The data line is electrically connected to the source electrode through the first contact hole. | 10-24-2013 |
20140038348 | ETCHANT COMPOSITION AND MANUFACTURING METHOD FOR THIN FILM TRANSISTOR USING THE SAME - An etchant composition includes ammonium persulfate (((NH | 02-06-2014 |
20140097006 | ETCHANT COMPOSITION, METAL WIRING, AND METHOD OF MANUFACTURING A DISPLAY SUBSTRATE - A wet etching composition usable for etching a copper-based wiring layer includes between about 40% by weight to about 60% by weight of phosphoric acid, between about 1% by weight to about 10% by weight of nitric acid, between about 3% by weight to about 15% by weight of acetic acid, between about 0.01% by weight to about 0.1% by weight of a copper-ion compound, between about 1% by weight to about 10% by weight of a nitric salt, between about 1% by weight to about 10% by weight of an acetic salt, and a remainder of water | 04-10-2014 |
20140125904 | LIQUID CRYSTAL DISPLAY - A liquid crystal display includes: a substrate; a gate line and a data line disposed on the substrate; a semiconductor layer disposed on the substrate; first and second field generating electrodes disposed on the substrate; and a first protecting layer formed from the same layer as the first field generating electrode and covering at least a portion of the data line. | 05-08-2014 |
20150053984 | THIN FILM TRANSISTOR SUBSTRATE AND THE METHOD THEREOF - A thin film transistor array panel includes a gate line, a gate insulating layer that covers the gate line, a semiconductor layer that is disposed on the gate insulating layer, a data line and drain electrode that are disposed on the semiconductor layer, a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode, and a pixel electrode that is electrically connected to the drain electrode through the contact hole. The data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, and the lower layer is wider than the upper layer, and the lower layer has a region that is exposed. The gate insulating layer may have a step shape. | 02-26-2015 |
20150055066 | THIN FILM TRANSISTOR SUBSTRATE, METHOD OF MANUFACTURING THE SAME, AND DISPLAY DEVICE INCLUDING THE SAME - A thin film transistor substrate includes a first substrate which includes a transmissive area and a reflective area, a common electrode disposed on the first substrate, a pixel electrode overlapped with and insulated from the common electrode, and a reflective portion which is disposed on the reflective area and includes a lower electrode which includes a first transparent conductive material, a metal layer disposed on the lower electrode, and an upper electrode disposed on the metal layer and including a second transparent conductive material different from the first transparent conductive material. | 02-26-2015 |