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Bong-Hyun
Bong Hyun Cho, Gwangju-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20100077334 | CONTENTS MANAGEMENT METHOD AND APPARATUS - A content management method and apparatus is provided for conveniently and efficiently classifying and filtering contents stored in at least one digital device. A contents management method may include displaying, when a digital device is connected, graphical user interface (GUI) objects representing the digital devices and contents stored in the digital devices, and setting keywords for classifying the contents in response to events triggered by user behaviors in association with at least one of the GUI objects. The method may also include displaying the GUI objects representative of the contents classified by using the keywords. | 03-25-2010 |
| 20100180209 | ELECTRONIC DEVICE MANAGEMENT METHOD, AND ELECTRONIC DEVICE MANAGEMENT SYSTEM AND HOST ELECTRONIC DEVICE USING THE METHOD - An electronic device managing method and system, and a host electronic device using the method are disclosed. The host electronic device may be connected to a plurality of client electronic devices. The host electronic device may perform file storage state management, remaining battery capacity management, and file reproduction management to integrally and efficiently managing the plurality of client electronic devices. The file storage state management includes managing file storage states corresponding to the memories of the plurality of client electronic devices. The remaining battery capacity management includes managing the remaining capacity of the batteries of the plurality of client electronic devices. The file reproduction management includes managing reproduction of at least one of the files stored in the plurality of client electronic devices. | 07-15-2010 |
| 20110138316 | METHOD FOR PROVIDING FUNCTION OF WRITING TEXT AND FUNCTION OF CLIPPING AND ELECTRONIC APPARATUS APPLYING THE SAME - A method for providing a text writing function and a clipping function and an electronic apparatus applying the same are provided. If a command is input while content is being displayed, a text writing screen including information related to the content is displayed. Accordingly, since the content-related information is automatically displayed when the user writes text relating to the content, the user is not required to input the content-related information separately. | 06-09-2011 |
Bong Hyun Cho, Gwangiu-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20100077337 | ELECTRONIC DEVICE MANAGEMENT METHOD, AND ELECTRONIC DEVICE MANAGEMENT SYSTEM AND HOST ELECTRONIC DEVICE USING THE METHOD - An electronic device managing method and system, and a host electronic device using the method are disclosed. A plurality of client electronic devices may be connected to the host electronic device. The host electronic device may perform file storage state management, remaining battery capacity management, and file reproduction management, thereby integrally and efficiently managing the plurality of client electronic devices. The file storage state management may include managing file storage states corresponding to the memories of the plurality of client electronic devices, respectively. The remaining battery capacity management may include managing the remaining capacity of the batteries of the plurality of client electronic devices. The file reproduction management may include reproducing at least one of the files stored in the plurality of client electronic devices. | 03-25-2010 |
Bong Hyun Chung, Taejeon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20100196937 | CASCADE ENZYME-LINKED IMMUNOSORBENT ASSAY - The present invention relates to a cascade enzyme-linked immunosorbent assay, more precisely a cascade enzyme-linked immunosorbent assay using magnetic microparticles (MMPs) immobilized with the target antigen specific primary antibody and silica nanoparticles (SPs) immobilized with a cascade reaction initiator and the antigen-specific secondary antibody. When the method of the present invention is applied in the detection of an antigen in biosamples, the detection sensitivity can be significantly increased. | 08-05-2010 |
| 20100209945 | METHOD FOR PREPARING ANTIBODY MONOLAYERS WHICH HAVE CONTROLLED ORIENTATION USING PEPTIDE HYBRID - The present invention relates to a method for preparing an protein monolayer using a peptide hybrid for protein immobilization, more precisely a peptide hybrid for protein immobilization which has improved solubility by introducing a PEG linker and a proper reaction group to the oligopeptide having specific affinity to selected types of proteins and is designed to provide enough space between solid substrates and proteins immobilized, whereby various solid substrates treated by the hybrid catch specific proteins effectively on. The peptide hybrid for protein immobilization of the present invention facilitates the control of orientation of an antibody on various solid surfaces and immobilization of various antibodies of different origins or having different isotypes with different affinity. Therefore, the surface treatment technique using the peptide hybrid of the invention can be effectively used for the production of various immunosensors and immune chips. | 08-19-2010 |
Bong Hyun Jung, Daejeon KR
| Patent application number | Description | Published |
|---|---|---|
| 20100059726 | MULTICOLOR-ENCODED COLLOIDAL PARTICLES COATED WITH METAL NANOPARTICLES MIXTURE HAVING COLORS IN THE VISIBLE REGION AND METHOD FOR PREPARING THE SAME - The present invention relates to multicolor colloidal particles coated with a metal nanoparticle mixture having colors in the visible region and a method for preparing the same. In particular, relates to a metal nanoparticle mixture in which two or more nanoparticles selected from the group consisting of metal nanoparticles exhibiting red color; metal nanoparticles exhibiting yellow color; and metal nanoparticles exhibiting blue color, are mixed in various compositional ratio, multicolor colloidal particles in which polymer or mineral colloidal particles are coated with the metal nanoparticle mixture, and a method for preparing the same. According to the present invention, all colors that are in the visible region can be developed by suitably mixing metal nanoparticles exhibiting three colors, and multicolor colloidal particles can be prepared by coating polymer or mineral colloidal particles with a metal nanoparticle mixture exhibiting various colors. | 03-11-2010 |
Bong Hyun Park, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20110120584 | LOW-NOISE PLASTIC INTERCOOLER PIPE HAVING MULTI-LAYERED STRUCTURE - The present invention provides a low-noise plastic intercooler pipe. In preferred embodiments, the present invention preferably provides a low-noise plastic intercooler pipe having a multi-layered structure including: a skin layer including a thermoplastic etherester elastomer (TEEE) and a soundproof core layer including glass bubbles. | 05-26-2011 |
Bong-Hyun Cho, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20100058780 | Liquefied Gas Storage Tank and Marine Structure Including the Same - The present disclosure relates to a liquefied gas storage tank and a marine structure including the same. The storage tank includes a plurality of liquefied gas storage tanks received in a plurality of spaces defined in a hull of the marine structure by a cofferdam and arranged in two rows. The cofferdam includes at least one longitudinal cofferdam extending in a longitudinal direction of the hull and at least one transverse cofferdam extending in a transverse direction of the hull. Each of the storage tanks is sealed and thermally insulated by a sealing wall and a thermal insulation wall extending without being disconnected. The longitudinal cofferdam supports load of an upper structure while suppressing a sloshing phenomenon. | 03-11-2010 |
| 20100206519 | TEMPERATURE CONTROL SYSTEM FOR SEMICONDUCTOR MANUFACTURING EQUIPMENT - A temperature control system for semiconductor manufacturing equipment is disclosed, which can properly cool a process chamber adopted in the semiconductor manufacturing equipment such as a wafer etching device. The temperature control system for semiconductor manufacturing equipment includes a thermocline for cooling heat transfer fluid accommodated therein through a heat exchange with a heat exchanger and storing heat energy, a supply line for controlling the temperature of the heat transfer fluid in the thermocline through a heater and supplying the heat transfer fluid with a proper temperature to a process device, a recovery line for forwarding the heat transfer fluid having passed through the process device to the thermocline, and a bypass for forwarding a part of the heat transfer fluid passing through the recovery line to the supply line through the heater. | 08-19-2010 |
Bong-Hyun Jeong, Incheon KR
| Patent application number | Description | Published |
|---|---|---|
| 20100151373 | Toner Particle Having Excellent Charging Characteristics,Long term Credibility and Transferring Property, Method for Producing the Same and Toner Containing Said Toner Particle - The invention relates to toner particles having excellent charging characteristics and transferring properties, a method for producing the same and toner including the same. More particularly, the invention relates to toner particles, a method for producing the same and toner including the same, in which a CCA highly compatible with a binder resin is readily dispersed in the binder resin, thereby improving charge-maintaining property and charge distribution, and the resultant mixture is sphered to realize excellent long term credibility and transfer property. The toner particles include a styrene/acrylate-based CCA; a styrene/acrylate-based binder resin; and a polyester-based binder resin. | 06-17-2010 |
Bong-Hyun Kim, Incheon KR
| Patent application number | Description | Published |
|---|---|---|
| 20110124176 | METHODS OF FORMING A CAPACITOR STRUCTURE AND METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME - In a method of forming a capacitor, a seed stopper and a sacrificial layer is formed on an insulating interlayer having a plug therethrough. An opening is formed through the sacrificial layer and the seed stopper to expose the plug. A seed is formed on an innerwall of the opening. A lower electrode is formed covering the seed on the innerwall of the opening. The sacrificial layer and the seed are removed. A dielectric layer and an upper electrode are sequentially formed on the lower electrode. | 05-26-2011 |
Bong-Hyun Kim, Bupyeong-Gu KR
| Patent application number | Description | Published |
|---|---|---|
| 20100009508 | Methods of fabricating stack type capacitors of semiconductor devices - Provided are methods of fabricating capacitors of semiconductor devices, the methods including: forming a lower electrode on a semiconductor substrate, performing a pre-process operation on the lower electrode for suppressing deterioration of the lower electrode during a process, forming a dielectric layer on the lower electrode using a source gas and an ozone gas, and forming an upper electrode on the dielectric layer, wherein the pre-process operation and the forming of the dielectric layer may be performed in one device capable of atomic layer deposition. | 01-14-2010 |
Bong-Hyun Kim, Incheon Metropolitan City KR
| Patent application number | Description | Published |
|---|---|---|
| 20080268653 | METHOD OF FORMING HIGH DIELECTRIC FILM USING ATOMIC LAYER DEPOSITION AND METHOD OF MANUFACTURING CAPACITOR HAVING THE HIGH DIELECTRIC FILM - A method of forming a high dielectric film using atomic layer deposition (ALD), and a method of manufacturing a capacitor having the high dielectric film, include supplying a precursor containing a metal element to a semiconductor substrate and purging a reactor; supplying an oxidizer and purging the reactor; and supplying a reaction source containing nitrogen and purging the reactor. | 10-30-2008 |
Bong-Hyun Kwon, Cheongju-City KR
| Patent application number | Description | Published |
|---|---|---|
| 20090045540 | ARTIFICIAL MARBLE USING MULTICOLOR CHIP AND METHOD FOR PREPARING THE SAME - Disclosed herein are an artificial marble using multicolor chips, particularly striped chips, and a method for preparing the artificial marble. Since the artificial marble comprises multicolor chips in a new form together with conventional single-color chips, it enables achievement of various appearances, including designs and colors, thereby being highly differentiated from conventional artificial marbles containing combinations of single-color chips as well as displaying patterns and designs closely resembling natural granite. | 02-19-2009 |
Bong-Hyun Lee, Seoul KR
| Patent application number | Description | Published |
|---|---|---|
| 20110077053 | MOBILE TERMINAL - A mobile terminal includes a front body, a rear body, and a slide module connecting the front body to the rear body such that the front body is slidable with respect to the rear body, the slide module including a first slide member fixed to a front surface of the rear body and having a rail unit at both sides of the rear body, the rail unit having a specific length corresponding to a slide stroke of the front body; and a second slide member fixed to a rear surface of the front body and having a moving guide constrained to the rail unit at both sides of the rear body and slidably moved along the rail unit, in which the moving guide protrudes toward the rear body in order to receive the rail unit and cover the rail unit. | 03-31-2011 |
Bong-Hyun Lee US
| Patent application number | Description | Published |
|---|---|---|
| 20110089534 | Semiconductor Integrated Circuit Devices Having Conductive Patterns that are Electrically Connected to Junction Regions - A semiconductor integrated circuit device includes a semiconductor substrate; a dummy pattern extending in one direction on the semiconductor substrate; a junction region electrically connecting the dummy pattern to the semiconductor substrate; and a voltage applying unit that is configured to apply a bias voltage to the dummy pattern. | 04-21-2011 |
Bong-Hyun Lee, Suwon Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090008740 | Semiconductor Integrated Circuit Devices Having Conductive Patterns that are Electrically Connected to Junction Regions and Methods of Fabricating Such Devices - A semiconductor integrated circuit device includes a semiconductor substrate; a dummy pattern extending in one direction on the semiconductor substrate; a junction region electrically connecting the dummy pattern to the semiconductor substrate; and a voltage applying unit that is configured to apply a bias voltage to the dummy pattern. | 01-08-2009 |
| 20090237107 | Circuit having an active clock shielding structure and semiconductor intergrated circuit including the same - A circuit having an active clock shielding structure includes a logic circuit that receives a clock signal and performs a logic operation based on the clock signal, a power gating circuit that switches a mode of the logic circuit between an active mode and an sleep mode based on a power gating signal, a clock signal transmission line that transmits the clock signal to the logic circuit, and at least one power gating signal transmission line that transmits the power gating signal to the power gating circuit and functions as a shielding line pair with the clock signal transmission line. | 09-24-2009 |
| 20100231255 | Power Gating Circuit and Integrated Circuit Including Same - A power gating circuit includes a logic circuit, a switching element and a retention flip-flop. The logic circuit is coupled between a first power rail and a virtual power rail. The switching element selectively couples the virtual power rail to a second power rail in response to a mode control signal indicating an active mode or a standby mode. The retention flip-flop selectively performs a flip-flop operation or a data retention operation in response to a voltage of the virtual power rail. | 09-16-2010 |
Bong-Hyun Lee, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20100058258 | Method of Estimating a Leakage Current in a Semiconductor Device - In a method of estimating a leakage current in semiconductor device, a chip including a plurality of cells is divided into segments by a grid model. Spatial correlation is determined as spatial correlation between process parameters concerned with the leakage currents in each of the cells. A virtual cell leakage characteristic function of the cell is generated by arithmetically operating actual leakage characteristic functions. A segment leakage characteristic function is generated by arithmetically operating the virtual cell leakage characteristic functions of each cell in the segment. Then, a full chip leakage characteristic function is generated by statistically operating the segment leakage characteristic functions of each segment in the chip. Accordingly, the computational loads of Wilkinson's method for generating the full chip leakage characteristic function may be remarkably reduced. | 03-04-2010 |
