Patent application number | Description | Published |
20080299755 | METHODS OF FABRICATING NON-VOLATILE MEMORY DEVICES INCLUDING A CHLORINE CURED TUNNEL OXIDE LAYER - Fabrication of a nonvolatile memory device includes sequentially forming a tunnel oxide layer, a first conductive layer, and a nitride layer on a semiconductor substrate. A stacked pattern is formed from the tunnel oxide layer, the first conductive layer, and the nitride layer and a trench is formed in the semiconductor substrate adjacent to the stacked pattern. An oxidation process is performed to form a sidewall oxide layer on a sidewall of the trench and the first conductive layer. Chlorine is introduced into at least a portion of the stacked pattern subjected to the oxidation process. Introducing Cl into the stacked pattern may at least partially cure defects that are caused therein during fabrication of the structure. | 12-04-2008 |
20090130834 | METHODS OF FORMING IMPURITY CONTAINING INSULATING FILMS AND FLASH MEMORY DEVICES INCLUDING THE SAME - Methods of forming an insulating film include forming an insulating film on a substrate. A first impurity is injected into the insulating film using a thermal process under a first set of processing conditions to form a first impurity concentration peak in a lower portion of the insulating film. A second impurity is injected into the insulating film using the thermal process under a second set of processing conditions, different from the first set of processing conditions, to form a second impurity concentration peak in an upper portion of the insulating film. Injecting the first impurity and injecting the second impurity may be carried out without using plasma and the first impurity concentration peak may be higher than the second impurity concentration peak. | 05-21-2009 |
20090206383 | Semiconductor Devices Having Tunnel and Gate Insulating Layers - A semiconductor device includes a semiconductor substrate having a surface, buried isolation regions protruding from the surface of the semiconductor substrate, and a first insulating layer on the surface of the semiconductor substrate between the isolation regions and including a fluorine, nitrogen, and/or heavy hydrogen impurity. A floating electrode is on the first insulating layer, a second insulating layer is on the floating electrode and the isolation regions, and a control gate electrode is on the second insulating layer. Related methods of forming semiconductor devices are also disclosed. | 08-20-2009 |
Patent application number | Description | Published |
20090020805 | NON-VOLATILE MEMORY DEVICES AND METHODS OF FORMING THE SAME - A non-volatile memory device includes a dielectric layer between a charge storage layer and a substrate. Free bonds of the dielectric layer can be reduced to reduce/prevent charges from leaking through the free bonds and/or from being trapped by the free bonds. As a result, data retention properties and/or durability of a non-volatile memory device may be enhanced. | 01-22-2009 |
20090042383 | METHOD OF FABRICATING A SEMICONDUCTOR DEVICE - A method of forming a dielectric layer having an air gap to isolate adjacent wirings or a gate stack of the semiconductor device is provided. A method of fabricating a semiconductor device includes providing a semiconductor substrate on which a plurality of wirings are formed adjacent to one another and forming a dielectric layer filling an upper portion of a space between the adjacent wirings to form air gaps by a thermal chemical vapor deposition method. | 02-12-2009 |
20090072294 | Method of manufacturing a non-volatile memory device - A method of manufacturing a non-volatile memory device employing a relatively thin polysilicon layer as a floating gate is disclosed, wherein a tunnel oxide layer is formed on a substrate and a polysilicon layer having a thickness of about 35 Å to about 200 Å is then formed on the tunnel oxide layer using a trisilane (Si | 03-19-2009 |
20090134450 | Tunneling insulating layer, flash memory device including the same, memory card and system including the flash memory device, and methods of manufacturing the same - Provided is a tunneling insulating layer, a flash memory device including the same that increases a program/erase operation speed of the flash memory device and has improved data retention in order to increase reliability of the flash memory device, a memory card and system including the flash memory device, and methods of manufacturing the same. A tunneling insulating layer may include a first region and a second region on the first region, wherein the first region has a first nitrogen atomic percent, the second region has a second nitrogen atomic percent, and the second nitrogen atomic percent is less than the first nitrogen atomic percent. The flash memory device according to example embodiments may include a substrate including source and drain regions and a channel region between the source and drain regions, the tunneling insulating layer on the channel region, a charge storage layer on the tunneling insulating layer, a blocking insulation layer on the charge storage layer, and a gate electrode on the blocking insulation layer. | 05-28-2009 |
20090203190 | Method of forming a mask stack pattern and method of manufacturing a flash memory device including an active area having rounded corners - A method of forming a mask stack pattern and a method of manufacturing a flash memory device including an active area having rounded corners are provided. The method of manufacture including forming a mask stack pattern defining an active region, the mask stack pattern having a pad oxide layer formed on a semiconductor substrate, a silicon nitride layer formed on the pad oxide layer and a stack oxide layer formed on the silicon nitride layer, oxidizing a surface of the semiconductor substrate exposed by the mask stack pattern and lateral surfaces of the silicon nitride layer such that corners of the active region are rounded, etching the semiconductor substrate having an oxidized surface to form a trench in the semiconductor substrate, forming a device isolation oxide layer in the trench, removing the silicon nitride layer from the semiconductor substrate, and forming a gate electrode in a portion where the silicon nitride layer is removed. | 08-13-2009 |
20110275190 | METHOD OF FORMING AN INSULATION STRUCTURE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME - In a method of forming an insulation structure, at least one oxide layer is formed on an object by at least one oxidation process, and then at least one nitride layer is formed from the oxide layer by at least one nitration process. An edge portion of the insulation structure may have a thickness substantially the same as that of a central portion of the insulation structure so that the insulation structure may have a uniform thickness and improved insulation characteristics. When the insulation structure is employed as a tunnel insulation layer of a semiconductor device, the semiconductor device may have enhanced endurance and improved electrical characteristics because a threshold voltage distribution of cells in the semiconductor device may become uniform. | 11-10-2011 |
20120129356 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE - A method of forming a dielectric layer having an air gap to isolate adjacent wirings or a gate stack of the semiconductor device is provided. A method of fabricating a semiconductor device includes providing a semiconductor substrate on which a plurality of wirings are formed adjacent to one another and forming a dielectric layer filling an upper portion of a space between the adjacent wirings to form air gaps by a thermal chemical vapor deposition method. | 05-24-2012 |
20140217483 | SEMICONDUCTOR DEVICES INCLUDING GATE PATTERN, MULTI-CHANNEL ACTIVE PATTERN AND DIFFUSION LAYER - A semiconductor device includes a gate pattern on a substrate, a multi-channel active pattern under the gate pattern to cross the gate pattern and having a first region not overlapping the gate pattern and a second region overlapping the gate pattern, a diffusion layer in the multi-channel active pattern along the outer periphery of the first region and including an impurity having a concentration, and a liner on the multi-channel active pattern, the liner extending on lateral surfaces of the first region and not extending on a top surface of the first region. Related fabrication methods are also described. | 08-07-2014 |
20140220752 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A method of fabricating a semiconductor device is described. The method of fabricating a semiconductor device comprises providing a fin formed to protrude from a substrate and a plurality of gate electrodes formed on the fin to intersect the fin; forming first recesses in the fin on at least one side of the respective gate electrodes; forming an oxide layer on the surfaces of the first recesses; and expanding the first recesses into second recesses by removing the oxide layer. Related devices are also disclosed. | 08-07-2014 |
20140299934 | Semiconductor Device and Method for Fabricating the Same - Provided is a semiconductor device. The semiconductor device includes a fin on a substrate; a gate electrode cross the fin on the substrate; a source/drain formed on at least one of both sides of the gate electrode, and including a first film and a second film; and a stress film arranged between an isolation film on the substrate and the source/drain, and formed on a side surface of the fin. | 10-09-2014 |
20150035023 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device may include first and second fins formed side by side on a substrate, a first elevated doped region formed on the first fin and having a first doping concentration of impurities, a second elevated doped region formed on the second fin, and a first bridge connecting the first elevated doped region and the second elevated doped region to each other. Methods of manufacturing such a semiconductor device are also disclosed. | 02-05-2015 |
20150162332 | SEMICONDUCTOR DEVICES HAVING COMPOSITE SPACERS CONTAINING DIFFERENT DIELECTRIC MATERIALS - An integrated circuit device includes an electrically conductive pattern on a substrate. This electrically conductive pattern may be a gate pattern of a field effect transistor. A first electrically insulating spacer is provided on a sidewall of the electrically conductive pattern. The first electrically insulating spacer includes a first lower spacer and a first upper spacer, which extends on the first lower spacer and has a side surface vertically aligned with a corresponding side surface of the first lower spacer. The first upper spacer has a greater dielectric constant relative to a dielectric constant of the first lower spacer. A pair of parallel channel regions may also be provided, which protrude from a surface of the substrate. The electrically conductive pattern may surround top and side surfaces of the pair of parallel channel regions. | 06-11-2015 |
20160049336 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device includes forming a trench defining a plurality of active fins in a substrate, forming a sacrificial layer on the plurality of active fins, forming a sacrificial oxide layer, and removing the sacrificial oxide layer. The forming the sacrificial oxide layer includes heat-treating the sacrificial layer and surfaces of the plurality of active fins. | 02-18-2016 |
20160079367 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device may have a structure that prevents or reduces an etching amount of certain portions, such as a part of a source/drain region. Adjacent active fins may be merged with a blocking layer extending between adjacent the source/drain region. The blocking layer may be of a material that is relatively high-resistant to the etchant. | 03-17-2016 |
20160086943 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A semiconductor device includes a substrate, an isolation layer on the substrate, and at least one active fin on the substrate. The isolation layer includes a first surface opposite a second surface. The first surface is contiguous with the substrate. The at least one active fin protrudes from the substrate and includes a first region having a side wall above the second surface of the isolation layer and a second region on the first region. The second region has an upper surface. The first region has a first width contiguous with the second surface of the isolation layer and a second width contiguous with the second region. The second width is 60% or greater than the first width (e.g., 60% to 100%). | 03-24-2016 |
20160087053 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device may include a substrate including an NMOS region and a PMOS region, and having a protrusion pattern; first and second gate structures respectively formed on the NMOS region and the PMOS region of the substrate, crossing the protrusion pattern, and extending along a first direction that is parallel to an upper surface of the substrate; first and second source/drain regions formed on both sides of the first and second gate structures; and first and second contact plugs respectively formed on the first and second source/drain regions, wherein the first contact plug and the second contact plug are asymmetric. Methods of manufacturing are also provided. | 03-24-2016 |
Patent application number | Description | Published |
20110296689 | METHOD OF ASSEMBLING A REFRIGERATOR - A method of assembling a refrigerator including providing a main body having a storage chamber, providing a door having a door liner on one side of the door, providing a seating member, providing an ice maker for making ice, attaching the ice maker to the seating member, attaching the seating member to the door liner, providing an ice bank for storing ice, attaching the ice bank to the seating member below the ice maker, and rotatably attaching the door to the main body. | 12-08-2011 |
20120272678 | ICE-MAKING DEVICE FOR REFRIGERATOR - A refrigerator including a main body having a storage chamber, a door provided to the main body to selectively open or close the storage chamber, the door including an outer door defining a front external appearance of the door, and a door liner defining a rear external appearance of the door, the door liner including support steps vertically extending along both sides of the door liner, a liner plate interconnecting the support steps, and a seating step horizontally extending from the door liner, the support steps and the seating step defining an installation space, an ice bank removably located on the door liner, and an ice maker cover located above the ice bank. | 11-01-2012 |
20130118201 | ICE-MAKING DEVICE FOR REFRIGERATOR - A refrigerator includes a main body having a storage chamber, a door provided to the main body, including an outer door and a door liner. The door liner includes support steps, a liner plate, and a seating step that define an installation space. An ice maker is located at least partially in the installation space. A cold air duct is provided in one side of the storage chamber to supply the ice maker with cold air. An ice maker cover is provided having a cold air inlet on a top portion thereof and a viewing window on a lower portion thereof. The viewing window allows the ice maker to be seen from outside of the ice maker cover. An ice bank is removably located below the ice maker to transfer ice received from the ice maker to a dispenser. | 05-16-2013 |
20140083128 | ICE-MAKING DEVICE FOR REFRIGERATOR - A refrigerator includes a main body having a storage chamber, a door provided to the main body, including an outer door and a door liner. The door liner includes support steps, a liner plate, and a seating step that define an installation space. An ice maker is located at least partially in the installation space. A cold air duct is provided in one side of the storage chamber to supply the ice maker with cold air. An ice maker cover is provided having a cold air inlet on a top portion thereof and a viewing window on a lower portion thereof. The viewing window allows the ice maker to be seen from outside of the ice maker cover. An ice bank is removably located below the ice maker to transfer ice received from the ice maker to a dispenser. | 03-27-2014 |