| Patent application number | Description | Published |
| 20090156757 | RUBBER COMPOSITION CONTAINING FUNCTIONALIZED POLYMER NANOPARTICLES - A polymer nanoparticle is provided. The nanoparticle includes an inner layer having alkenylbenzene monomer units. The nanoparticle further includes an outer layer having monomer units selected from conjugated dienes, alkylenes, alkenylbenzenes, and mixtures thereof. The nanoparticle has at least one functional group associated with the outer layer. Applications of use as additives for rubber, including the rubber compositions, are also provided. | 06-18-2009 |
| 20100016472 | Rubber Composition Containing Functionalized Polymer Nanoparticles - A polymer nanoparticle is provided. The nanoparticle includes an inner layer having alkenylbenzene monomer units. The nanoparticle further includes an outer layer having monomer units selected from conjugated dienes, alkylenes, alkenylbenzenes, and mixtures thereof. The nanoparticle has at least one functional group associated with the outer layer. Applications of use as additives for rubber, including the rubber compositions, are also provided. | 01-21-2010 |
| 20100137520 | Branched Polymers and Methods for Their Synthesis and Use - Branched polymers including multi-branched polymers, functionalized branched polymers, star-branched polymers, and dendigraft polymers. Methods for the synthesis of branched polymers and method for the use of branched polymers in tire components are also included. | 06-03-2010 |
| 20110054051 | PROCESSES FOR RECOVERING RUBBER FROM NATURAL RUBBER LATEX - Processes for recovering natural rubber from an aqueous natural rubber latex that contains extractables and one or more additives and that is essentially free of lignocellulosic plant material are described. Natural rubber in the latex is separated from the water. Preferably, the amount of non-rubber extractables in the natural rubber is reduced by one or more extraction steps yielding a dried natural rubber. | 03-03-2011 |
| Patent application number | Description | Published |
| 20090063717 | Rate Adaptation for Support of Full-Speed USB Transactions Over a High-Speed USB Interface - A USB communications interface (USBCI) may enable communication between a high-speed USB device, e.g. a High-Speed-Inter-Chip (HSIC) USB device, and a non high-speed USB host, e.g. a full-speed USB host. The USBCI may receive first data from the USB host via a non high-speed transaction, and buffer the first data. The USBCI may also initiate a high-speed transaction corresponding to the non high-speed transaction to the USB device, and transmit at least a portion of the buffered first data to the USB device via the high-speed transaction. The USBCI may subsequently receive second data from the USB device via the high-speed transaction, and buffer the second data. The USBCI may also transmit at least a portion of the buffered second data to the USB host via the non high-speed transaction, and complete the non high-speed transaction upon the high-speed transaction completing. | 03-05-2009 |
| 20090106474 | Multi-Host USB Device - A USB device may be simultaneously configured and accessed by two or more USB hosts. The USB device may include separate upstream ports and buffers for each host, and a multi-host capable device controller configured to respond to simultaneous USB requests received from more than one host. The USB device may maintain a dedicated address, configuration, and response information for each host. The USB device may include a shared USB function block, and a multi-host controller configured to establish concurrent respective USB connections between the shared USB function block and two or more USB hosts, to allow the two or more USB hosts to simultaneously configure the USB device for the shared USB function. The multi-host controller may be configured to receive and respond to simultaneous respective USB access requests for the shared USB function sent by the two or more USB hosts. | 04-23-2009 |
| 20100205337 | DIGITAL DEVICE INTERCONNECT SYSTEM - A simple clock source synchronous DDR data transfer mechanism may be combined with static bus state signaling to replace a complex bus (e.g. USB) with an easy to implement digital serial interconnect bus. This may eliminate various pull-up/pull-down resistors required in USB, and enable the interconnect bus to operate with little or no leakage current when the bus is in an idle state, or data transmission state. All required functionality may be implemented using only two signal pins. The interconnect bus may also enable silicon solutions for high speed USB that do not require a PLL, since the clock may be provided by the transmission source and may thus not need to be recovered from the serial data stream. The digital serial interconnect bus may provide an easy reuse mechanism for USB silicon by enabling a designer to remove the analog PHY and replace it with a serial digital I/O transfer mechanism, while retaining the IP's USB timers, and other protocol specific features. | 08-12-2010 |
| 20100205339 | DIGITAL DEVICE INTERCONNECT METHOD - A simple clock source synchronous DDR data transfer mechanism may be combined with static bus state signaling to replace a complex bus (e.g. USB) with an easy to implement digital serial interconnect bus. This may eliminate various pull-up/pull-down resistors required in USB, and enable the interconnect bus to operate with little or no leakage current when the bus is in an idle state, or data transmission state. All required functionality may be implemented using only two signal pins. The interconnect bus may also enable silicon solutions for high speed USB that do not require a PLL, since the clock may be provided by the transmission source and may thus not need to be recovered from the serial data stream. The digital serial interconnect bus may provide an easy reuse mechanism for USB silicon by enabling a designer to remove the analog PHY and replace it with a serial digital I/O transfer mechanism, while retaining the IP's USB timers, and other protocol specific features. | 08-12-2010 |