Patent application number | Description | Published |
20080317099 | Method and apparatus for signal carrier-to-noise power density ratio caculation - There is provided an apparatus for determining a carrier-to-noise power density ratio (CN | 12-25-2008 |
20080317101 | Method and apparatus for detecting lock status of a GPS signal - An apparatus for detecting lock status of a spread spectrum signal, having a first accumulator, a first calculation unit, a second calculation unit, a second accumulator, a multiplier and a comparator. The first accumulator accumulates an in-phase integration result and a quadrature integration result over a time period. The first calculation unit determines a first evaluation value based on the accumulated in-phase integration result and the accumulated quadrature integration result. The second calculation unit processes the in-phase integration result and the quadrature integration result. The second accumulator accumulates the output of the second calculation unit over the time period. The multiplier determines a second evaluation value by multiplying the accumulated result from the second accumulator with a predetermined value. The comparator compares the first and second evaluation results wherein the comparison result is an indicator of the lock status. | 12-25-2008 |
20100328150 | NAVIGATION SYSTEM WITH ERROR-DETECTION ON DOPPLER FREQUENCIES OF SATELLITE SIGNALS - A navigation system for detecting error on Doppler frequencies of a plurality of satellite signals measured by the navigation system is disclosed herein. The navigation system includes an offset calculator for calculating offsets of the Doppler frequencies of the satellite signals during a predetermined time period and calculating an average value of the offsets. The navigation system further includes an error detecting unit coupled to the offset calculator. The error detecting unit compares the offsets of the Doppler frequencies of the satellite signals with the average value of the offsets and determines whether the satellite signals are unavailable according to corresponding comparison results. | 12-30-2010 |
20100328156 | SYSTEM FOR DEMODULATING NAVIGATION BITS FROM SATELLITE SIGNALS - A signal processing system for demodulating navigation bits from a satellite signal is disclosed herein. The signal processing system includes a digital baseband processor for determining a boundary between two navigation bits in the navigation bits according to a first plurality of coarse acquisition (C/A) codes captured from the satellite signals, storing the first plurality of C/A codes, and demodulating a second plurality of C/A codes captured after determining the boundary to recover a first series of the navigation bits. The signal processing system further includes a complementary demodulating unit coupled to the digital baseband processor for demodulating the first plurality of C/A codes to recover a second series of the navigation bits. | 12-30-2010 |
20100332126 | INERTIAL NAVIGATION SYSTEM WITH ERROR CORRECTION BASED ON NAVIGATION MAP - An inertial navigation system with error correction based on a navigation map is disclosed herein. The inertial navigation system can include a trajectory calculator for calculating a position and an orientation of a moving object based on moving information of the moving object, an error correcting unit coupled to the trajectory calculator for correcting the position and the orientation of the moving object based on reference road information, and a storage unit coupled to the error correcting unit for storing geographical information of a road network and providing the reference road information according to the geographical information of the road network. | 12-30-2010 |
20140064422 | CDR CIRCUIT AND TERMINAL - Embodiments of the present invention disclose a CDR circuit and a terminal, where the CDR circuit is configured to perform clock synchronization in a terminal with EEE function, and the CDR circuit includes: a phase detector, a first phase signal selector, a loop filter, a numerical controlled oscillator, a second phase signal selector, a phase signal generator, and a state machine. In the embodiments of the present invention, after the terminal enters a REFRESH state from a QUIET state, the CDR circuit can implement clock synchronization with a peer end without waiting for the loop filter and the numerical controlled oscillator to be converged, but the phase signal generator generates a phase signal satisfying a preset clock synchronization condition, and the second phase signal selector selects the phase signal satisfying the preset clock synchronization condition as the phase selection signal of the CDR. | 03-06-2014 |