| Patent application number | Description | Published |
| 20080207588 | Spiro-Heterocyclic Chromans, Thiochromans and Dihydroquinolines - The present invention is concerned with certain novel derivatives of Formula I, | 08-28-2008 |
| 20090170814 | 7,8-BICYCLOAKYL-CHROMAN DERIVATIVES - 7,8-Bicyclic-chroman derivatives of Formula I: | 07-02-2009 |
| 20090192179 | CHROMAN DERIVATIVES - The invention relates to novel chroman derivatives, stereoisomers and pharmaceutically acceptable salts of Formula I | 07-30-2009 |
| 20100202989 | METHODS FOR TREATMENT OF DERMATOLOGICAL CONDITIONS - A method of reducing the appearance of skin conditions associated with loss of skin tightness, skin firmness, or dark circles under the eyes with topical compositions comprising compounds of any of the Formulae I or Ia as described herein, is disclosed. | 08-12-2010 |
| 20120088783 | CHROMAN DERIVATIVES - The invention relates to novel chroman derivatives, stereoisomers and pharmaceutically acceptable salts of Formula I | 04-12-2012 |
| Patent application number | Description | Published |
| 20090043060 | Process For the Preparation of a Polymer - The invention relates to a process for the preparation of a polymer comprising at least aliphatic or aromatic hydrocarbyl C | 02-12-2009 |
| 20100144224 | POLYETHYLENE FILM WITH HIGH TENSILE STRENGTH AND HIGH TENSILE ENERGY TO BREAK - The present invention pertains to a UHMWPE film having a tensile strength of at least 2.0 GPa, a tensile energy to break of at least 30 J/g, an Mw of at least 500 000 gram/mole, and a Mw/Mn ratio of at most 6. The film may be manufactured via a process which comprises subjecting a starting UHMWPE with a weight average molecular weight of at least 500 000 gram/mole, an elastic shear modulus determined directly after melting at 160° C. of at most 0.9 MPa, and a Mw/Mn ratio of at most 6 to a compacting step and a stretching step under such conditions that at no point during the processing of the polymer its temperature is raised to a value above its melting point. The film may be used as starting material in any applications where high tensile strength and high energy to break are important. Suitable applications include ballistic applications, ropes, cables, nets, fabrics, and protective applications. | 06-10-2010 |
| 20100160581 | Catalyst Composition for Polymerization of Olefins, Polymerization Process Using the Same, and Method for Its Preparation - The present invention relates to a supported catalyst composition for polymerization of olefins comprising at least two catalytic components; and a polymerization process using that catalyst composition; and a method for its preparation. | 06-24-2010 |
| Patent application number | Description | Published |
| 20090141568 | No-Disturb Bit Line Write for Improving Speed of eDRAM - A method of operating a memory circuit includes providing the memory circuit. The memory circuit includes a memory cell; a word line connected to the memory cell; a first local bit line and a second local bit line connected to the memory cell; and a first global bit line and a second global bit line coupled to the first and the second local bit lines, respectively. The method further includes starting an equalization to equalize voltages on the first and the second local bit lines; stopping the equalization; and after the step of starting the equalization and before the step of stopping the equalization, writing values from the first and the second global bit lines to the first and the second local bit lines. | 06-04-2009 |
| 20090141570 | Controlling Global Bit Line Pre-Charge Time for High Speed eDRAM - A method of operating a memory includes performing a write operation and a read operation on a memory cell. The write operation includes starting a first global bit line (GBL) pre-charge on a GBL; and after the first GBL pre-charge is started, enabling a word line to write into the memory cell, wherein the steps of starting the first GBL pre-charge and enabling the word line have a first time interval. The read operation includes starting a second GBL pre-charge on the GBL; and after the second GBL pre-charge is started, enabling the word line to read from the memory cell, wherein the steps of starting the second GBL pre-charge and enabling the word line have a second time interval. The first time interval is greater than the second time interval. | 06-04-2009 |
| 20090231939 | Circuit and Method for a Vdd Level Memory Sense Amplifier - A circuit and method for a sense amplifier for sensing the charge stored by a memory cell is disclosed. The memory cell is coupled to a bit line, a complementary bit line and a differential sense amplifier is coupled to the bit line and the complementary bit line. A control signal couples a reference voltage to the complementary bit line. A positive precharge voltage is applied to the bit line and complementary bit line prior to the sense amplifier being enabled. The memory cell outputs a voltage to the bit line responsive to a word line, and the sense amplifier senses the differential voltage between the bit line and the complementary bit line responsive to a sense enable signal. A voltage regulator for generating the reference voltage, preferably about 80% of a positive supply voltage, is disclosed. A method of sensing data stored by a memory cell is disclosed. | 09-17-2009 |
| 20110199835 | No-Disturb Bit Line Write for Improving Speed of eDRAM - A method of operating a memory circuit includes providing the memory circuit. The memory circuit includes a memory cell; a word line connected to the memory cell; a first local bit line and a second local bit line connected to the memory cell; and a first global bit line and a second global bit line coupled to the first and the second local bit lines, respectively. The method further includes starting an equalization to equalize voltages on the first and the second local bit lines; stopping the equalization; and after the step of starting the equalization and before the step of stopping the equalization, writing values from the first and the second global bit lines to the first and the second local bit lines. | 08-18-2011 |
| 20110316617 | METHOD AND APPARATUS FOR FULL CLOCK CYCLE CHARGE PUMP OPERATION - A charge pump comprises at least one charge pump cell and control logic. The at least one charge pump cell is configured to receive a power supply voltage and provide a pump output voltage higher than the power supply voltage. The control logic is configured to receive an oscillator signal and a level detector enable signal, provide at least one cell clock signal, based on the oscillator signal, to the at least one charge pump cell, control the at least one pump cell to charge while the level detector enable signal is asserted, and control the at least one pump cell to continue to charge after the level detector enable signal is deasserted and until a full pulse cycle of the oscillator signal is completed. | 12-29-2011 |
| Patent application number | Description | Published |
| 20080212251 | BATTERY PROTECTING CIRCUIT AND BATTERY WITH SUCH PROTECTING CIRCUIT - A protecting circuit for a battery used to power an electronic system includes a control circuit and a sensing circuit. The sensing circuit includes a tri-axial accelerometer having X, Y and Z axes. The tri-axial accelerometer is capable of detecting position changes of the battery and outputs through the X, Y and Z axes voltages that correspond to the position changes. The sensing circuit ultimately outputs a controlling voltage to the control circuit according to the voltages outputted by the X, Y and Z axes. When the battery is being installed onto or uninstalled from the electronic system, the outputted controlling voltage makes the control circuit OFF and the battery cannot power the electronic system. When the battery have been installed onto the electronic system, the outputted controlling voltage turns the control circuit ON and the battery can supply power to the electronic system. | 09-04-2008 |
| 20110208844 | CLUSTER SYSTEM, METHOD AND DEVICE FOR EXPANDING CLUSTER SYSTEM - A method for expanding a cluster system is provided. The cluster system includes at least one Cluster Central Chassis (CCC), and a newly-added Cluster Line-card Chassis (CLC) connected with the CCC to form the cluster system. The method includes the following steps. A control plane is established. An equipment management right is switched to the CCC, so that the CCC manages the newly-added CLC. Meanwhile, a cluster line-card device, a cluster central exchange device, and a cluster system are further provided. In implementation, smooth expansion can be achieved without interrupting running equipment services in the CLC current network and without interrupting data services. Moreover, during the expansion process, hardware equipment needs not to be replaced, thus investment of users on the equipment is reduced. | 08-25-2011 |