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| 20100315149 | High-speed data compared latch with auto-adjustment of offset - A high-speed data compared latch with auto-adjustment of offset, includes input pair transistors P, input pair transistors N, a compared latch module, an input control module, an output control module and a offset logic control module, the offset logic control module creates two control signals that regulate the number of input pair transistors P and input pair transistors N respectively according to reset signal RESET and the latched output of the compared latch module, and achieve self correcting of offset through regulating the number of the input pair transistors P and the input pair transistors N. The present invention is a feedback mechanism, automatically trimming the number of differential input pair to achieve the trimming differential pair operating point and the threshold voltage, eliminate the process variation, and latch on more precise control match the differential input pair transistors of the high-speed data compared latch in receiver accurately. | 12-16-2010 |
| 20110261915 | System and method for self-correcting the multiphase clock - A system for self-correcting the multiphase clock includes a transmitter, a receiver, a random code generator and a controller. The random code generator generates a random code stream, the random code stream is transformed to the high-speed serial data by the transmitter, the high-speed serial data are sent into the receiver and transformed to the parallel data by the receiver, the parallel data are sent into the controller, the controller stores the random code stream and detects the probability of the bit error of the parallel data output by the receiver. According to the test result of the bit error, the controller generates a phase adjustment control signal for adjusting the phase uniformity of the multiphase clock. Also, a method for self-correcting the phase uniformity of the multiphase clock of the present invention effectively makes up the sampling bit errors caused by the phase nonuniformity of the multiphase clock. | 10-27-2011 |
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| 20100278427 | METHOD AND SYSTEM FOR PROCESSING TEXT - The present invention provides a method and system for text processing. The method comprises determining at least a part of characters in a text; dividing the text into a plurality of text segments by using the at least a part of characters as separators; and decoding the plurality of text segments respectively. | 11-04-2010 |
| 20100300335 | AC Plasma Ejection Gun, the Method for Supplying Power to it and Pulverized Coal Burner - An AC plasma ejection gun, the method for supplying power to the gun and a pulverized coal burner are provided. The ejection gun comprising: a power supply device, having a live wear and a null wear; an electric front electrode, inside of which a front chamber is set, a nozzle connected with said front chamber is set at the outlet of the front electrode, an air inlet pipe connected with said front chamber is set at the inlet of the front electrode, and the front electrode is connected with said null wire; an electric rear electrode, connected with the inlet of said front electrode by an insulated ring, there is a gap between the electric rear electrode and said front electrode, said rear electrode is connected with the live wire, a spinning air inlet ring is set at the outside of the gap between said front electrode and said rear electrode, compressed air from the air inlet pipe passes the spinning air inlet ring and enters into the front chamber; wherein, the arc between said front electrode and said rear electrode discharges, ionizing the compressed air into plasma in the gap between said front electrode and said rear electrode, and the plasma is ejected out of the nozzle from the front chamber. The ejection gun in present invention can work with small current and large power, so that the life of the plasma ejection gun is prolonged. | 12-02-2010 |
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| 20090261843 | LOAD SIMULATOR - A load simulator includes an indicator, a first resistor, and a second resistor. A first terminal of the indicator is connected to a first pin of a charger, while a second terminal of the indicator is grounded. The indicator and the first resistor are connected in parallel. Two terminals of the second resistor are connected to a second pin of the charger and ground, respectively. | 10-22-2009 |
| 20090263011 | Detection Technique for Digitally Altered Images - Techniques are generally described to determine whether a JPEG image has undergone two compressions. Probabilities can be computed for the first digits of quantized DCT (discrete cosine transform) coefficients from a set of AC (alternate current) modes to detect or determine whether the JPEG image has undergone two compressions. The set of AC modes may include a predetermined number of distinguishable AC modes where a distinguishable AC mode may be an AC mode in which a second quantization step (QS | 10-22-2009 |
| 20100020295 | METHOD TO FABRICATE PATTERN IN HOUSING - A method to fabricate a pattern on a housing, includes following steps: placing a film having a first lightproof area and a first light-transmissible area on a housing having light-sensitive inks formed in surface; radiating light on the film and light passing through the light-transmissible area and solidifying the light-sensitive inks; removing the film from the housing and cleaning the un-solidified light-sensitive inks; wiredrawing first wires in the housing and forming first wires in exposed area correspondingly; covering part of the first wires and wiredrawing second wires, the second wires crosses with part of the first wires. | 01-28-2010 |
| 20100028709 | HOUSING OF ELECTRONIC DEVICE AND ELECTRONIC DEVICE USING THE SAME - An exemplary housing of electronic device includes a metallic main body and a metallic three-dimensional weaving member formed on at least a part of a surface of the metallic main body. An electronic device using the housing is also provided. The housing of the electronic device has a textured touching feeling. | 02-04-2010 |
| 20100153491 | Method, System And Client Terminal For Sending Data In Instant Messaging System - Embodiments of the present disclosure provide a method, a system and a client terminal for sending data in an IM system, which belong to computer technologies. The method includes: sending an Email carrying a large amount of data of a first user to an offline second user; sending an offline message to the second user, the offline message carrying information of the first user and an identifier of the Email, with which the second user obtains the large amount of data. The system includes a client terminal of a first user and a client terminal of a second user. By adopting embodiments of the present disclosure, a large amount of data sent by the user, such as offline documents or offline voice information, etc, may be received in an IM system. | 06-17-2010 |
| 20100272963 | HOUSING HAVING WOVEN APPEARANCE AND MANUFACTURING METHOD THEREOF - A housing having a woven appearance includes a substrate and a plurality of groove groups formed on the surface of the substrate. The groove groups define the woven appearance and are formed by etching. The housing may be made by using a film having a lightproof areas and a light-transmissible areas, the lightproof areas defining a woven appearance. The film is placed over a metal substrate having light-sensitive materials formed thereon and radiated with light. The light passing through the light-transmissible areas of the film solidifies the light-sensitive materials. After, removing the film from the substrate and cleaning un-solidified light-sensitive materials from the substrate to expose areas corresponding to the lightproof area, and an etching process is carried out to form the woven appearance on the exposed areas. | 10-28-2010 |
| 20110187295 | ELECTRONIC APPARATUS - An electronic apparatus includes a main body, a cover, a driving device, a receiving unit, and a processing unit. The cover is pivotably connected to the main body. The driving device drives the cover to rotate relative to the main body between an open position and a closed position. The receiving unit receives a control signal from an input device. The processing unit directs the driving device to rotate the cover relative to the main body between the open position and the closed position according to the control signal. | 08-04-2011 |
| 20110234063 | HOUSING OF ELECTRONIC DEVICE AND METHOD FOR MAKING THE SAME - A housing of electronic device includes a main plate and a metal peripheral wall, the peripheral wall is fabricated by cold drawn and secured to the periphery of the main plate. | 09-29-2011 |
| 20110238219 | ELECTRONIC APPARATUS WITH AUTOMATIC ORIENTATION FUNCTION - An electronic apparatus includes a first member, a second member with a first point and a second point, a processing unit, and a drive device. The drive device pivotably connects the second member to the first member. The processing unit calculates a first distance between the first point and a third point and a second distance between the second point and the third point. The processing unit controls the drive device to rotate the second member relative to the first member according to the first distance and the second distance, thus the line defined by the third point and a middle point between the first point and the second point is perpendicular to the line defined by the first point and the second point. | 09-29-2011 |
| 20110291829 | ELECTRONIC DEVICE WITH AN ALARM FUNCTION - An electronic device includes a main body. The main body includes a hook and a sliding button. The hook is connected to the sliding button. A first groove and a second groove are defined in the main body and communicate with each other to form a slot. The hook protrudes from the first groove and the sliding button protrudes from the second groove. The main body further includes a sensor, a processing unit and an alarm unit. The sensor is located on an inner wall of the slot. When the sliding button is slid, the hook moves along with the sliding button and comes in contact with the sensor. The sensor generates a sensing signal due to the contact with the hook. When the processing unit receives the sensing signal from the sensor, the processing unit controls the alarm unit to sound an alarm. | 12-01-2011 |
| 20110292009 | ELECTRONIC DEVICE AND METHOD FOR AUTOMATICALLY ADJUSTING OPENING ANGLE THEREOF - An electronic device includes a base, a display pivotably connecting to the base, a detecting unit, a processing unit, and a driving unit. The detecting unit is for detecting a positional relationship between the display and a user in front of the display. The processing unit is for generating an adjusting signal according to the positional relationship. The driving unit is for adjusting an opening angle defined between the display and the base according to the adjusting signal. | 12-01-2011 |
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| 20100002500 | Read Reference Circuit for a Sense Amplifier Within a Chalcogenide Memory Device - A read reference circuit for a sense amplifier within a chalcogenide memory device is disclosed. The read reference circuit provides a reference voltage level to the sense amplifier for distinguishing between a logical “0” state and a logical “1” state within a chalcogenide memory cell. In conjunction with a precharge circuit, the read reference circuit generates a selectable read reference current to the sense amplifier in order to detect the logical state of the chalcogenide memory cell. The precharge circuit precharges the bitlines of the chalcogenide memory cell before the sense amplifier detects the logical state of the chalcogenide memory cell. | 01-07-2010 |
| 20100027321 | Non-Volatile Single-Event Upset Tolerant Latch Circuit - A non-volatile single-event upset (SEU) tolerant latch is disclosed. The non-volatile SEU tolerant latch includes a first and second inverters connected to each other in a cross-coupled manner. The gates of transistors within the first inverter are connected to the drains of transistors within the second inverter via a first feedback resistor. Similarly, the gates of transistors within the second inverter are connected to the drains of transistors within the first inverter via a second feedback resistor. The non-volatile SEU tolerant latch also includes a pair of chalcogenide memory elements connected to the inverters for storing information. | 02-04-2010 |
| 20100039857 | Write Circuit for Providing Distinctive Write Currents to a Chalcogenide Memory Cell - A write circuit for providing distinctive write currents to a chalcogenide memory cell is disclosed. The write circuit includes a current amplitude trim module, a current amplification and distribution module, and a write current shaping module. The current amplitude trim module provides a well-compensated current across a predetermined range of temperatures, voltage supplies and process corners intended for programming a chalcogenide memory cell. The current amplification and distribution module amplifies the well-compensated current in order to meet a programming requirement of the chalcogenide memory cell. The write current shaping module supplies an appropriate amount of write “0” current or write “1” current, based on the amplified current, to program the chalcogenide memory cell accordingly. | 02-18-2010 |
| 20100074000 | Analog Access Circuit for Validating Chalcogenide Memory Cells - An analog access circuit for characterizing chalcogenide memory cells is disclosed. The analog access circuit includes an analog access control module, an address and data control module, and an analog cell access and current monitoring module. The analog access control module selectively controls whether a normal memory access or an analog memory access should be performed on a specific chalcogenide memory cell. The address and data control module allows a normal memory access to the chalcogenide memory cell according to an input address. The analog cell access and current monitoring module performs an analog memory access to the chalcogenide memory cell according to the input address, and monitors a reference current from a sense amplifier associated with the chalcogenide memory cell. | 03-25-2010 |
| 20100135070 | Adjustable Write Pulse Generator Within a Chalcogenide Memory Device - An adjustable write pulse generator is disclosed. The adjustable write pulse generator includes a band-gap reference current, a programmable ring oscillator, a frequency divider and a single pulse generator. The band-gap reference current circuit generates a well-compensated current over a predetermined range of temperatures needed to program a chalcogenide memory cell. The programmable ring oscillator generates a first set of continuous write “0” and write “1” pulse signals based on the well-compensated current. The frequency divider then divides the first set of continuous write “0” and write “1” pulse signals into a second set of continuous write “0” and write “1” pulse signals. The single pulse generator subsequently converts the second set of continuous write “0” and write “1” pulse signals into a single write “0” pulse signal or a single write “1” pulse signal when programming the chalcogenide memory cell. | 06-03-2010 |
| 20100141296 | HARDENED CURRENT MODE LOGIC (CML) VOTER CIRCUIT, SYSTEM AND METHOD - A current mode logic voter circuit includes three two-input split NOR gates. Each two-input split NOR gate receives a corresponding pair of input signals and generates a pair of first output signals responsive to the input signals. A three input split NOR gate is coupled to the two-input split NOR gates to receive the first output signals and generates a second pair of output signals responsive to the first output signals from the two-input split NOR gates. The two and three-input split NOR gates can be formed from current mode logic buffer circuits, and in one embodiment in the three-input split NOR gate the buffer circuits are hardened. | 06-10-2010 |
