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Bhuiyan
Ekram Bhuiyan, San Jose, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20110133710 | Partial Feedback Mechanism in Voltage Regulators to Reduce Output Noise Coupling and DC Voltage Shift at Output - Techniques are presented for reducing the DC voltage shift in a voltage regulator, particularly for high and ultra-high speed load switching operation. The regulator includes a power transistor, connected between an input supply voltage and an output node, and an error amplifier, having its output connected to control the gate of the output transistor, a first input connected to receive a reference voltage, and a second input connected to a feedback node. The regulator also includes a first resistance, connected between the feedback node and ground, and also a second resistance, a third resistance, and a first capacitance, where the feedback node is connected to the output node through a combination of the first capacitance in parallel with the second resistance and in series with the third resistance. Consequently, the feedback path from the output node of the regulator uses a partial feedback mechanism, where the capacitance is included to generate a zero in the feedback divider path, but a resistance is placed in series with the capacitance so that at high frequencies the feedback level is still separated from the output level. | 06-09-2011 |
| 20110234268 | Apparatus and Method for Host Power-On Reset Control - A host power-on reset control circuit includes a comparator connected to receive both a divided version of a supply voltage and a reference voltage. The comparator generates and outputs a high digital state signal when the divided version of the supply voltage is at least as large as the reference voltage. The control circuit includes an output node connected to transmit a power-on reset control signal. The control circuit includes pulldown circuitry connected between the comparator output and the output node. The pulldown circuitry maintains the output node at a reset voltage level as the supply voltage rises to a host operational level, based on a signal present at the comparator output. The control circuit includes pullup circuitry connected between the supply voltage and the output node. The pullup circuitry maintains the output node at a non-reset voltage level after the supply voltage has risen to the host operational level. | 09-29-2011 |
Ekram H. Bhuiyan, San Jose, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20110156760 | TEMPERATURE-STABLE OSCILLATOR CIRCUIT HAVING FREQUENCY-TO-CURRENT FEEDBACK - A signal generating circuit and method are disclosed that do not require a phase-locked-loop and a low frequency temperature-stable oscillator. The method may include generating an oscillating output signal responsive to a feedback signal, where the feedback signal controls a frequency of the oscillating output signal, generating a current output signal having a magnitude corresponding to the frequency of the oscillating output signal, and then comparing the current output signal to a reference signal to generate the feedback signal. The signal generating circuit may include an oscillator circuit responsive to a feedback signal and a frequency-to-current conversion circuit configured to generate a frequency dependent current signal that is compared to a reference current to generate an output signal corresponding to the frequency of the oscillating output signal. A feedback conversion circuit compares the output signal with a reference signal to generate the feedback signal to the oscillator circuit. | 06-30-2011 |
Ekram Hossain Bhuiyan, San Jose, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090153234 | CURRENT MIRROR DEVICE AND METHOD - In an embodiment, a circuit is disclosed that includes a current mirror including a first transistor pair and a second transistor pair. The first transistor pair includes a first transistor and a second transistor. The second transistor pair includes cascode transistors. The circuit also includes an operational amplifier having an output coupled to both the first transistor and the second transistor. | 06-18-2009 |
| 20090160423 | Self-configurable multi-regulator ASIC core power delivery - An electronic product includes an application specific semiconductor circuit (ASIC) including in its circuitry both a linear regulator module for use with an optional external capacitance and a capless regulator module coupled to internal capacitance of the product. The capless regulator module includes both a low-power sub-module and a high-power sub-module. Control logic of the ASIC is configured to determine if an external capacitance is present. If so, the control logic causes the high-power capless regulator sub-module to be used during a power-up phase of the ASIC; if not, only the low-power capless regulator sub-module is used during the power-up phase of the ASIC. After power-up of the ASIC, the control logic may select the linear regulator module for certain times of operation and the capless regulator module for other times of operation or it may select one or the other for all times of post-power-up operation. | 06-25-2009 |
| 20090164807 | Self-configurable multi-regulator ASIC core power delivery - A method for operating an electronic product having an application specific semiconductor circuit (ASIC) including in its circuitry both a linear regulator module for use with an optional external capacitance and a capless regulator module coupled to internal capacitance of the product selects a low-power sub-module or high-power sub-module of the capless regulator module for use in a power-up phase of the ASIC. Control logic of the ASIC determines if an external capacitance is present. If so, then the high-power capless sub-module is used during a power-up phase of the ASIC; if not only the low-power capless sub-module is used during the power-up phase of the ASIC. After power-up of the ASIC, the control logic may select the linear regulator module for certain times of operation and the capless regulator module for other times of operation or it may select one or the other for all times of post-power-up operation. | 06-25-2009 |
Mohammed Taj Bhuiyan, Wichita, KS US
| Patent application number | Description | Published |
|---|---|---|
| 20110079680 | Aircraft with tuned vibration absorber mounted on skin - An apparatus and method for attenuating noise and vibration in a propeller aircraft comprises a tuned vibration absorber adapted to be mounted to the skin of a fuselage of a propeller aircraft. The tuned vibration absorber may be tuned to the second harmonic of a blade passage frequency of a propeller of the aircraft. The tuned vibration absorber may be connectable to a separately formed mount, which can be mounted to the fuselage skin independently of the tuned vibration absorber. The apparatus may include a cover to prevent interference between the tuned vibration absorber and other components in the aircraft. The apparatus may be used in combination with other attenuation systems to attenuate noise and vibration over a broad range of frequencies. | 04-07-2011 |
Rashed H. Bhuiyan, West Columbia, SC US
| Patent application number | Description | Published |
|---|---|---|
| 20120013292 | Non-Intrusive Energy Harvesting Systems and Methods - In accordance with certain embodiments of the present disclosure, an energy harvesting system is provided. The system comprises a coil wound about a generally cylindrical shaped magnetic core having a first end and a second end. The coil includes wires that are wound in such a manner that the wires are generally parallel to the cylindrical shaped magnetic core axis. The cylindrical shaped magnetic core defines a core gap that extends parallel to the magnetic core axis. The cylindrical shaped magnetic core also defines an opening extending therethrough from the first end to the second end such that the cylindrical shaped magnetic core is configured to fit around current carrying conductor. | 01-19-2012 |