| Patent application number | Description | Published |
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| 20090045447 | COMPLEX OXIDE NANODOTS - Methods and devices are disclosed, such as those involving forming a charge trap for, e.g., a memory device, which can include flash memory cells. A substrate is exposed to temporally-separated pulses of a titanium source material, a strontium source material, and an oxygen source material capable of forming an oxide with the titanium source material and the strontium source material to form the charge trapping layer on the substrate. | 02-19-2009 |
| 20090250681 | Non-Volatile Resistive Oxide Memory Cells, Non-Volatile Resistive Oxide Memory Arrays, And Methods Of Forming Non-Volatile Resistive Oxide Memory Cells And Memory Arrays - A method of forming a non-volatile resistive oxide memory cell includes forming a first conductive electrode of the memory cell as part of a substrate. Insulative material is deposited over the first electrode. An opening is formed into the insulative material over the first electrode. The opening includes sidewalls and a base. The opening sidewalls and base are lined with a multi-resistive state layer comprising multi-resistive state metal oxide-comprising material which less than fills the opening. A second conductive electrode of the memory cell is formed within the opening laterally inward of the multi-resistive state layer lining the sidewalls and elevationally over the multi-resistive state layer lining the base. Other aspects and implementations are contemplated. | 10-08-2009 |
| 20090272960 | Non-Volatile Resistive Oxide Memory Cells, and Methods Of Forming Non-Volatile Resistive Oxide Memory Cells - A method of forming a non-volatile resistive oxide memory cell includes forming a first conductive electrode of the memory cell as part of a substrate. The first conductive electrode has an elevationally outermost surface and opposing laterally outermost edges at the elevationally outermost surface in one planar cross section. Multi-resistive state metal oxide-comprising material is formed over the first conductive electrode. Conductive material is deposited over the multi-resistive state metal oxide-comprising material. A second conductive electrode of the memory cell which comprises the conductive material is received over the multi-resistive state metal oxide-comprising material. The forming thereof includes etching through the conductive material to form opposing laterally outermost conductive edges of said conductive material in the one planar cross section at the conclusion of said etching which are received laterally outward of the opposing laterally outermost edges of the first conductive electrode in the one planar cross section. | 11-05-2009 |
| 20090294967 | Diodes, And Methods Of Forming Diodes - Some embodiments include methods of forming diodes. The methods may include oxidation of an upper surface of a conductive electrode to form an oxide layer over the conductive electrode. In some embodiments, the methods may include formation of an oxidizable material over a conductive electrode, and subsequent oxidation of the oxidizable material to form an oxide layer over the conductive electrode. In some embodiments, the methods may include formation of a metal halide layer over a conductive electrode. Some embodiments include diodes that contain a metal halide layer between a pair of diode electrodes. | 12-03-2009 |
| 20090317540 | Methods Of Forming A Non-Volatile Resistive Oxide Memory Array - A method of forming a non-volatile resistive oxide memory array includes forming a plurality of one of conductive word lines or conductive bit lines over a substrate. Metal oxide-comprising material is formed over the plurality of said one of the word lines or bit lines. A series of elongated trenches is provided over the plurality of said one of the word lines or bit lines. A plurality of self-assembled block copolymer lines is formed within individual of the trenches in registered alignment with and between the trench sidewalls. A plurality of the other of conductive word lines or conductive bit lines is provided from said plurality of self-assembled block copolymer lines to form individually programmable junctions comprising said metal oxide-comprising material where the word lines and bit lines cross one another. | 12-24-2009 |
| 20100003782 | Methods Of Forming A Non-Volatile Resistive Oxide Memory Cell And Methods Of Forming A Non-Volatile Resistive Oxide Memory Array - A method of forming a non-volatile resistive oxide memory cell includes forming a first conductive electrode of the memory cell as part of a substrate. Metal oxide-comprising material is formed over the first conductive electrode. Etch stop material is deposited over the metal oxide-comprising material. Conductive material is deposited over the etch stop material. A second conductive electrode of the memory cell which comprises the conductive material received is formed over the etch stop material. Such includes etching through the conductive material to stop relative to the etch stop material and forming the non-volatile resistive oxide memory cell to comprise the first and second conductive electrodes having both the metal oxide-comprising material and the etch stop material therebetween. Other implementations are contemplated. | 01-07-2010 |
| 20100062562 | Methods Utilizing Microwave Radiation During Formation Of Semiconductor Constructions - Some embodiments include methods in which microwave radiation is used to activate dopant and/or increase crystallinity of semiconductor material during formation of a semiconductor construction. In some embodiments, the microwave radiation has a frequency of about 5.8 gigahertz, and a temperature of the semiconductor construction does not exceed about 500° C. during the exposure to the microwave radiation. | 03-11-2010 |
| 20100123122 | SELECT DEVICES INCLUDING AN OPEN VOLUME, MEMORY DEVICES AND SYSTEMS INCLUDING SAME, AND METHODS FOR FORMING SAME - Select devices including an open volume that functions as a high bandgap material having a low dielectric constant are disclosed. The open volume may provide a more nonlinear, asymmetric I-V curve and enhanced rectifying behavior in the select devices. The select device may comprise, for example, a metal-insulator-insulator-metal (MIIM) device. Various methods may be used to form select devices and memory systems including such select devices. Memory devices and electronic systems include such select devices. | 05-20-2010 |
| 20100129980 | Methods Of Forming Diodes - Some embodiments include methods of forming diodes. A stack may be formed over a first conductive material. The stack may include, in ascending order, a sacrificial material, at least one dielectric material, and a second conductive material. Spacers may be formed along opposing sidewalls of the stack, and then an entirety of the sacrificial material may be removed to leave a gap between the first conductive material and the at least one dielectric material. In some embodiments of forming diodes, a layer may be formed over a first conductive material, with the layer containing supports interspersed in sacrificial material. At least one dielectric material may be formed over the layer, and a second conductive material may be formed over the at least one dielectric material. An entirety of the sacrificial material may then be removed. | 05-27-2010 |
| 20100258903 | STRONTIUM RUTHENIUM OXIDE INTERFACE - Strontium ruthenium oxide provides an effective interface between a ruthenium conductor and a strontium titanium oxide dielectric. Formation of the strontium ruthenium oxide includes the use of atomic layer deposition to form strontium oxide and subsequent annealing of the strontium oxide to form the strontium ruthenium oxide. A first atomic layer deposition of strontium oxide is preformed using water as an oxygen source, followed by a subsequent atomic layer deposition of strontium oxide using ozone as an oxygen source. | 10-14-2010 |
| 20100315760 | Capacitors Having Dielectric Regions That Include Multiple Metal Oxide-Comprising Materials - Capacitors and methods of forming capacitors are disclosed, and which include an inner conductive metal capacitor electrode and an outer conductive metal capacitor electrode. A capacitor dielectric region is received between the inner and the outer conductive metal capacitor electrodes and has a thickness no greater than 150 Angstroms. Various combinations of materials of thicknesses and relationships relative one another are disclosed which enables and results in the dielectric region having a dielectric constant k of at least 35 yet leakage current no greater than 1×10 | 12-16-2010 |
| 20100316793 | Methods Of Forming Capacitors Having Dielectric Regions That Include Multiple Metal Oxide-Comprising Materials - Capacitors and methods of forming capacitors are disclosed, and which include an inner conductive metal capacitor electrode and an outer conductive metal capacitor electrode. A capacitor dielectric region is received between the inner and the outer conductive metal capacitor electrodes and has a thickness no greater than 150 Angstroms. Various combinations of materials of thicknesses and relationships relative one another are disclosed which enables and results in the dielectric region having a dielectric constant k of at least 35 yet leakage current no greater than 1×10 | 12-16-2010 |
| 20100330770 | Diodes, And Methods Of Forming Diodes - Some embodiments include methods of forming diodes. The methods may include oxidation of an upper surface of a conductive electrode to form an oxide layer over the conductive electrode. In some embodiments, the methods may include formation of an oxidizable material over a conductive electrode, and subsequent oxidation of the oxidizable material to form an oxide layer over the conductive electrode. In some embodiments, the methods may include formation of a metal halide layer over a conductive electrode. Some embodiments include diodes that contain a metal halide layer between a pair of diode electrodes. | 12-30-2010 |
| 20110021001 | Vapor Deposition Methods for Forming a Metal-Containing Layer on a Substrate - Atomic layer deposition methods as described herein can be advantageously used to form a metal-containing layer on a substrate. For example, certain methods as described herein can form a strontium titanate layer that has low carbon content (e.g., low strontium carbonate content), which can result in layer with a high dielectric constant. | 01-27-2011 |
| 20110062511 | DEVICE HAVING COMPLEX OXIDE NANODOTS - Devices are disclosed, such as those having a memory cell. The memory cell includes an active area formed of a semiconductor material; a first dielectric over the semiconductor material; a second dielectric comprising a material having a perovskite structure over the first dielectric; a third dielectric over the second dielectric; and a gate electrode over the third dielectric. | 03-17-2011 |
| 20110069529 | Methods Of Reading And Using Memory Cells - Some embodiments include methods of reading memory cells. The memory cells have a write operation that occurs only if a voltage of sufficient absolute value is applied for a sufficient duration of time; and the reading is conducted with a pulse that is of too short of a time duration to be sufficient for the write operation. In some embodiments, the pulse utilized for the reading may have an absolute value of voltage that is greater than or equal to the voltage utilized for the write operation. In some embodiments, the memory cells may comprise non-ohmic devices; such as memristors and diodes. | 03-24-2011 |
| 20110165728 | METHODS OF SELF-ALIGNED GROWTH OF CHALCOGENIDE MEMORY ACCESS DEVICE - Self-aligning fabrication methods for forming memory access devices comprising a doped chalcogenide material. The methods may be used for forming three-dimensionally stacked cross point memory arrays. The method includes forming an insulating material over a first conductive electrode, patterning the insulating material to form vias that expose portions of the first conductive electrode, forming a memory access device within the vias of the insulating material and forming a memory element over the memory access device, wherein data stored in the memory element is accessible via the memory access device. The memory access device is formed of a doped chalcogenide material and formed using a self-aligned fabrication method. | 07-07-2011 |
