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Belluomini

Wendy Belluomini, San Jose, CA US

Patent application number	Description	Published
20090083504	Data Integrity Validation in Storage Systems - A data storage method comprises storing first data in at least a first data chunk, wherein the first data chunk is a logical representation of one or more sectors on at least a first disk drive in a storage system; storing first metadata, associated with the first data, in at least a first appendix, wherein the first appendix is a logical representation of a sector region on at least the first disk drive in the storage system, and wherein the first metadata comprises first atomicity metadata (AMD) and first validity metadata (VMD) associated with the first data; and storing a copy of the first VMD for the first data in at least one low latency non-volatile storage (LLNVS) device.	03-26-2009

Wendy A. Belluomini, San Jose, CA US

Patent application number	Description	Published
20080282105	DATA INTEGRITY VALIDATION IN STORAGE SYSTEMS - Data validation systems and methods are provided. Data is recorded in N data chunks on one or more storage mediums. A first validation chunk independently associated with said N data chunks comprises first validation information for verifying accuracy of data recorded in said N data chunks. The first validation chunk is associated with a first validation appendix comprising second validation information, wherein the first validation appendix is stored on a first storage medium independent of said one or more storage mediums.	11-13-2008
20090089760	COMPUTER PROGRAM PRODUCT OF CODE COVERAGE UTILIZING EFFICIENT DYNAMIC MUTATION OF LOGIC (EDML) - A computer program product for code coverage utilizing efficient dynamic mutation of logic (EDML) are provided. A source code is read, and instrumentation points are located. Self Modifying Code (SMC) is inserted at the instrumentation points producing instrumented code. Additional functions are inserted in the source code to enable read and/or reset of code coverage statistics. The instrumented code is compiled, and executables are run for a period of time during which zero or more instrumentation points are executed. In response to executing instrumentation points, instructions are executed to record execution of the instrumented code. Instructions of the instrumented code overwrite themselves at certain points so that a next execution of the instrumentation points skips over the instrumented code at the certain points. Code coverage statistics are gathered and recorded. The code coverage statistics are reset to begin another period of time for gathering code coverage statistics.	04-02-2009
20090089771	METHOD OF CODE COVERAGE UTILIZING EFFICIENT DYNAMIC MUTATION OF LOGIC (EDML) - A method and computer program product for code coverage utilizing efficient dynamic mutation of logic (EDML) are provided. A source code is read, and instrumentation points are located. Self Modifying Code (SMC) is inserted at the instrumentation points producing instrumented code. Additional functions are inserted in the source code to enable read and/or reset of code coverage statistics. The instrumented code is compiled, and executables are run for a period of time during which zero or more instrumentation points are executed. In response to executing instrumentation points, instructions are executed to record execution of the instrumented code. Instructions of the instrumented code overwrite themselves at certain points so that a next execution of the instrumentation points skips over the instrumented code at the certain points. Code coverage statistics are gathered and recorded. The code coverage statistics are reset to begin another period of time for gathering code coverage statistics.	04-02-2009
20100217752	DATA INTEGRITY VALIDATION IN STORAGE SYSTEMS - Data validation systems and methods are provided. Data is recorded in N data chunks on one or more storage mediums. A first validation chunk independently associated with said N data chunks comprises first validation information for verifying accuracy of data recorded in said N data chunks. The first validation chunk is associated with a first validation appendix comprising second validation information, wherein the first validation appendix is stored on a first storage medium independent of said one or more storage mediums.	08-26-2010
20110093648	ACHIEVING A HIGH THROUGHPUT IN A STORAGE CACHE APPLICATION USING A FLASH SOLID STATE DISK - According to one embodiment, a method for using flash memory in a storage cache comprises receiving data to be cached in flash memory of a storage cache, at least some of the received data being received from at least one of a host system and a storage medium, selecting a block of the flash memory for receiving the data, buffering the received data until sufficient data has been received to fill the block, and overwriting existing data in the selected block with the buffered data. According to another embodiment, a method comprises receiving data, at least some of the data being from a host system and/or a storage medium, and sequentially overwriting sequential blocks of the flash memory with the received data. Other devices and methods for working with flash memory in a storage cache according to various embodiments are included and described herein.	04-21-2011

Wendy Ann Belluomini, San Jose, CA US

Patent application number	Description	Published
20100088579	DATA INTEGRITY VALIDATION IN A COMPUTING ENVIRONMENT - A method for validating data in a data storage system comprising associating a first data chunk with first check data and storing the first data chunk and the first check data on a first storage device. Additional associated data chunks of the first data and associated additional check data are stored on at least one of the first storage device or one or more additional storage devices. At least a portion of the first check data and at least a portion of the additional check data are stored to a second storage device, which is distinct from the first storage device and the additional storage devices. I/O access to the second storage device is minimized by retaining at least a portion of the first check data and at least a portion of the additional check data in a readily accessible storage medium, during servicing of a first I/O request.	04-08-2010
20100122055	DATA INTEGRITY VALIDATION USING HIERARCHICAL VOLUME MANAGEMENT - A method for reading data from a data storage system is provided. The method comprises requesting a virtual data volume to access data from one or more data blocks in the data storage system; requesting a virtual protection information volume to access protection information associated with the data blocks; validating the data using the protection information; and providing the data to the host interface, in response to successful validation of the data. A method for writing data to a data storage system is also provided. The method comprises receiving data to be written to one or more data blocks in the data storage system, wherein the data is stored in a cache; generating protection information to be stored on a virtual protection information volume; requesting a virtual data volume to update the data blocks with the data; and requesting the virtual protection information volume to store the protection information.	05-13-2010

Wendy Ann Belluomini, Austin, TX US

Patent application number	Description	Published
20080284469	REDUCED POWER CONSUMPTION LIMITED-SWITCH DYNAMIC LOGIC (LSDL) CIRCUIT - An limited-switch dynamic logic (LSDL) circuit provides reduced power consumption by reducing clock power dissipation. By clocking LSDL gates with a clock signal having a reduced voltage swing in the evaluation phase, the LSDL gates are permitted to operate, while reducing the clock power consumption dramatically. Since clock power consumption dominates in LSDL circuits, the reduction in clock power dissipation results in a significant reduction in overall circuit power consumption. The reduced swing clock is produced at a plurality of local clock buffers by supplying the local clock buffers with an extra power supply rail that is switched onto the clock distribution lines by the local clock buffers in response to the full-swing evaluate phase clock received from the global clock distribution network by the local clock buffers.	11-20-2008