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Baskaran, US
Muthu M. Baskaran, Columbus, OH US
| Patent application number | Description | Published |
|---|---|---|
| 20110078226 | Sparse Matrix-Vector Multiplication on Graphics Processor Units - Techniques for optimizing sparse matrix-vector multiplication (SpMV) on a graphics processing unit (GPU) are provided. The techniques include receiving a sparse matrix-vector multiplication, analyzing the sparse matrix-vector multiplication to identify one or more optimizations, wherein analyzing the sparse matrix-vector multiplication to identify one or more optimizations comprises analyzing a non-zero pattern for one or more optimizations and determining whether the sparse matrix-vector multiplication is to be reused across computation, optimizing the sparse matrix-vector multiplication, wherein optimizing the sparse matrix-vector multiplication comprises optimizing global memory access, optimizing shared memory access and exploiting reuse and parallelism, and outputting an optimized sparse matrix-vector multiplication. | 03-31-2011 |
Namadev Baskaran, Acton, MA US
| Patent application number | Description | Published |
|---|---|---|
| 20090178151 | NUCLEIC ACID ENCODING A NOVEL PROSTAGLANDIN RECEPTOR PROTEIN AND METHODS OF USE THEREOF - Described herein is a novel member of the prostanoid receptor family, a guinea pig prostaglandin D2 receptor. Described are the receptor, the nucleic acid that encodes it, and various uses for both. | 07-09-2009 |
| 20100152427 | NUCLEIC ACID ENCODING A NOVEL DP RECEPTOR PROTEIN AND METHODS OF USE THEREOF - Described herein is a novel member of the prostanoid receptor family, a guinea pig prostaglandin D2 receptor. Described are the receptor, the nucleic acid that encodes it, and various uses for both. | 06-17-2010 |
Rajashree Baskaran, Phoenix, AZ US
| Patent application number | Description | Published |
|---|---|---|
| 20080237729 | PATTERNED BACKSIDE STRESS ENGINEERING FOR TRANSISTOR PERFORMANCE OPTIMIZATION - Some embodiments of the present invention include selectively inducing back side stress opposite transistor regions to optimize transistor performance. | 10-02-2008 |
| 20090065788 | Semiconductor substrate with islands of diamond and resulting devices - Disclosed is a method of forming a substrate having islands of diamond (or other material, such as diamond-like carbon), as well as integrated circuit devices formed from such a substrate. A diamond island can form part of the thermal solution for an integrated circuit formed on the substrate, and the diamond island can also provide part of a stress engineering solution to improve performance of the integrated circuit. Other embodiments are described and claimed. | 03-12-2009 |
Rajashree Baskaran, Phoeniz, AZ US
| Patent application number | Description | Published |
|---|---|---|
| 20090034206 | WAFER-LEVEL ASSEMBLY OF HEAT SPREADERS FOR DUAL IHS PACKAGES - An embodiment of the present invention is a technique to fabricate a package. A heat spreader (HS) array on a HS support substrate is formed. The HS array has a plurality of heat spreaders. A diced wafer supported by a wafer support substrate (WSS) is formed. The diced wafer has a plurality of thin dice. The thin dice in the diced wafer are bonded to the heat spreaders in the HS array to form HS-bonded thin dice between the HS support substrate and the WSS. | 02-05-2009 |
Rajashree Baskaran, Chandler, AZ US
| Patent application number | Description | Published |
|---|---|---|
| 20080230106 | Forming a thin film electric cooler and structures formed thereby - Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a first plurality of openings through a first surface of a substrate, forming a p-type TFTEC material within the first plurality of openings, forming a second plurality of openings substantially adjacent to the first plurality of openings through the first surface of the substrate, and then forming an n-type TFTEC material within the second plurality of openings. | 09-25-2008 |
Rajesh Baskaran, Kalispell, MT US
| Patent application number | Description | Published |
|---|---|---|
| 20080264774 | METHOD FOR ELECTROCHEMICALLY DEPOSITING METAL ONTO A MICROELECTRONIC WORKPIECE - Metal seed layers and/or barrier layers are treated to render them more suitable for subsequent electrochemical deposition of metals thereon. The processes employ thermal techniques to reduce metal oxides that have formed on the surface of the seed layers and/or barrier layers. | 10-30-2008 |
Subramanian Baskaran, Durham, NC US
| Patent application number | Description | Published |
|---|---|---|
| 20100272680 | Piperidinyl Cyclic Amido Antiviral Agents - Provided are compounds of Formula (I) and pharmaceutically acceptable salts thereof, their pharmaceutical compositions, their methods of preparation, and their use for treating viral infections mediated by a member of the Flaviviridae family of viruses such as hepatitis C virus (HCV). | 10-28-2010 |