Patent application number | Description | Published |
20090286381 | Protective Layer To Enable Damage Free Gap Fill - In-situ semiconductor process that can fill high aspect ratio (typically at least 6:1, for example 7:1 or higher), narrow width (typically sub 0.13 micron, for example 0.1 micron or less) gaps without damaging underlying features and little or no incidence of voids or weak spots is provided. A protective layer is deposited to protect underlying features in regions of the substrate having lower feature density so that unwanted material may be removed from regions of the substrate having higher feature density. This protective layer may deposits thicker on a low density feature than on a high density feature and may be deposited using a PECVD process or low sputter/deposition ratio HDP CVD process. This protective layer may also be a metallic oxide layer that is resistant to fluorine etching, such as zirconium oxide (ZrO | 11-19-2009 |
20100099271 | METHOD FOR IMPROVING PROCESS CONTROL AND FILM CONFORMALITY OF PECVD FILM - A method for forming a silicon-based dielectric film on a substrate with a single deposition process operation using pulsed plasma enhanced chemical vapor deposition (PECVD) wherein the high frequency radio frequency power of the plasma is pulsed, allows enhanced control, efficiency and product quality of the PECVD process. Pulsing the high frequency RF power of the plasma reduces the deposited film thickness per unit time the high frequency RF power of the plasma is on. This yields silicon-based dielectric films that are both thin and conformal. | 04-22-2010 |
20100261349 | UV TREATMENT FOR CARBON-CONTAINING LOW-K DIELECTRIC REPAIR IN SEMICONDUCTOR PROCESSING - A method for the ultraviolet (UV) treatment of carbon-containing low-k dielectric enables process-induced damage repair. The method is particularly applicable in the context of damascene processing. A method provides for forming a semiconductor device by depositing a carbon-containing low-k dielectric layer on a substrate and forming a trench in the low-k dielectric layer, the trench having sidewalls ending at a bottom. The trench is then exposed to UV radiation and, optionally a gas phase source of —CH | 10-14-2010 |
20100267231 | APPARATUS FOR UV DAMAGE REPAIR OF LOW K FILMS PRIOR TO COPPER BARRIER DEPOSITION - An apparatus and method for the ultraviolet (UV) treatment of carbon-containing low-k dielectric enables process-induced damage repair. A semiconductor substrate processing system may be configured to include degas and plasma pre-clean modules, UV process modules, copper diffusion barrier deposition modules and copper seed deposition modules such that the substrate is held under vacuum and is not exposed to ambient air after low k damage repair and before copper barrier layer deposition. Inventive methods provide for treatment of a damaged low-k dielectric on a semiconductor substrate with UV radiation to repair processing induced damage and barrier layer deposition prior breaking vacuum. | 10-21-2010 |
20100308463 | INTERFACIAL CAPPING LAYERS FOR INTERCONNECTS - Adhesive layers residing at an interface between metal lines and dielectric diffusion barrier (or etch stop) layers are used to improve electromigration performance of interconnects. Adhesion layers are formed by depositing a precursor layer of metal-containing material (e.g., material containing Al, Ti, Ca, Mg, etc.) over an exposed copper line, and converting the precursor layer to a passivated layer (e.g., nitridized layer). For example, a substrate containing exposed copper line having exposed Cu—O bonds is contacted with trimethylaluminum to form a precursor layer having Al—O bonds and Al—C bonds on copper surface. The precursor layer is then treated to remove residual organic substituents and to form Al—N, Al—H bonds or both. The treatment can include direct plasma treatment, remote plasma treatment, UV-treatment, and thermal treatment with a gas such as NH | 12-09-2010 |
20100317178 | REMOTE PLASMA PROCESSING OF INTERFACE SURFACES - Embodiments related to the cleaning of interface surfaces in a semiconductor wafer fabrication process via remote plasma processing are disclosed herein. For example, in one disclosed embodiment, a semiconductor processing apparatus comprises a processing chamber, a load lock coupled to the processing chamber via a transfer port, a wafer pedestal disposed in the load lock and configured to support a wafer in the load lock, a remote plasma source configured to provide a remote plasma to the load lock, and an ion filter disposed between the remote plasma source and the wafer pedestal. | 12-16-2010 |
20100317198 | REMOTE PLASMA PROCESSING OF INTERFACE SURFACES - Embodiments related to the cleaning of interface surfaces in a semiconductor wafer fabrication process via remote plasma processing are disclosed herein. For example, in one disclosed embodiment, a semiconductor processing apparatus comprises a processing chamber, a load lock coupled to the processing chamber via a transfer port, a wafer pedestal disposed in the load lock and configured to support a wafer in the load lock, and a remote plasma source configured to provide a remote plasma to the load lock. | 12-16-2010 |
20110045610 | UV TREATMENT FOR CARBON-CONTAINING LOW-K DIELECTRIC REPAIR IN SEMICONDUCTOR PROCESSING - A method for the ultraviolet (UV) treatment of carbon-containing low-k dielectric enables process-induced damage repair. The method is particularly applicable in the context of damascene processing. A method provides for forming a semiconductor device by depositing a carbon-containing low-k dielectric layer on a substrate and forming a trench in the low-k dielectric layer, the trench having sidewalls ending at a bottom. The trench is then exposed to UV radiation and, optionally a gas phase source of —CH | 02-24-2011 |
20110111533 | UV AND REDUCING TREATMENT FOR K RECOVERY AND SURFACE CLEAN IN SEMICONDUCTOR PROCESSING - Treatment of carbon-containing low-k dielectric with UV radiation and a reducing agent enables process-induced damage repair. Also, treatment with a reducing agent and UV radiation is effective to clean a processed wafer surface by removal of metal oxide (e.g., copper oxide) and/or organic residue of CMP slurry from the planarized surface of a processed wafer with or without low-k dielectric. The methods of the invention are particularly applicable in the context of damascene processing to recover lost low-k property of a dielectric damaged during processing, either pre-metalization, post-planarization, or both, and/or provide effective post-planarization surface cleaning to improve adhesion of subsequently applied dielectric barrier and/or other layers. | 05-12-2011 |
20110117678 | CARBON CONTAINING LOW-K DIELECTRIC CONSTANT RECOVERY USING UV TREATMENT - A method for the ultraviolet (UV) treatment of carbon-containing low-k dielectric and associated apparatus enables process induced damage repair. The methods of the invention are particularly applicable in the context of damascene processing to recover lost low-k property of a dielectric damaged during processing, either pre-metallization, post-planarization, or both. UV treatments can include an exposure of the subject low-k dielectric to a constrained UV spectral profile and/or chemical silylating agent, or both. | 05-19-2011 |
20110120377 | REMOTE PLASMA PROCESSING OF INTERFACE SURFACES - Embodiments related to the cleaning of interface surfaces in a semiconductor wafer fabrication process via remote plasma processing are disclosed herein. For example, in one disclosed embodiment, a semiconductor processing apparatus comprises a processing chamber, a load lock coupled to the processing chamber via a transfer port, a wafer pedestal disposed in the load lock and configured to support a wafer in the load lock, a remote plasma source configured to provide a remote plasma to the load lock, and an ion filter disposed between the remote plasma source and the wafer pedestal. | 05-26-2011 |
20110133313 | HARDMASK MATERIALS - Hardmask films having high hardness and low stress are provided. In some embodiments a film has a stress of between about −600 MPa and 600 MPa and hardness of at least about 12 GPa. In some embodiments, a hardmask film is prepared by depositing multiple sub-layers of doped or undoped silicon carbide using multiple densifying plasma post-treatments in a PECVD process chamber. In some embodiments, a hardmask film includes a high-hardness boron-containing film selected from the group consisting of Si | 06-09-2011 |
20110135557 | HARDMASK MATERIALS - Hardmask films having high hardness and low stress are provided. In some embodiments a film has a stress of between about −600 MPa and 600 MPa and hardness of at least about 12 GPa. In some embodiments, a hardmask film is prepared by depositing multiple sub-layers of doped or undoped silicon carbide using multiple densifying plasma post-treatments in a PECVD process chamber. In some embodiments, a hardmask film includes a high-hardness boron-containing film selected from the group consisting of Si | 06-09-2011 |
20110151678 | NOVEL GAP FILL INTEGRATION - Novel gap fill schemes involving depositing both flowable oxide films and high density plasma chemical vapor deposition oxide (HDP oxide) films are provided. According to various embodiments, the flowable oxide films may be used as a sacrificial layer and/or as a material for bottom up gap fill. In certain embodiments, the top surface of the filled gap is an HDP oxide film. The resulting filled gap may be filled only with HDP oxide film or a combination of HDP oxide and flowable oxide films. The methods provide improved top hat reduction and avoid clipping of the structures defining the gaps. | 06-23-2011 |
20110236594 | In-Situ Deposition of Film Stacks - Methods and hardware for depositing film stacks in a process tool in-situ (i.e., without a vacuum break or air exposure) are described. In one example, a method for depositing, on a substrate, a film stack including films of different compositions in-situ in a process station using a plasma is described, the method including, in a first plasma-activated film deposition phase, depositing a first layer of film having a first film composition on the substrate; in a second plasma-activated deposition phase, depositing a second layer of film having a second film composition on the first layer of film; and sustaining the plasma while transitioning a composition of the plasma from the first plasma-activated film deposition phase to the second plasma-activated film deposition phase. | 09-29-2011 |
20110236600 | Smooth Silicon-Containing Films - Methods and hardware for depositing ultra-smooth silicon-containing films and film stacks are described. In one example, an embodiment of a method for forming a silicon-containing film on a substrate in a plasma-enhanced chemical vapor deposition apparatus is disclosed, the method including supplying a silicon-containing reactant to the plasma-enhanced chemical vapor deposition apparatus; supplying a co-reactant to the plasma-enhanced chemical vapor deposition apparatus; supplying a capacitively-coupled plasma to a process station of the plasma-enhanced chemical vapor deposition apparatus, the plasma including silicon radicals generated from the silicon-containing reactant and co-reactant radicals generated from the co-reactant; and depositing the silicon-containing film on the substrate, the silicon-containing film having a refractive index of between 1.4 and 2.1, the silicon-containing film further having an absolute roughness of less than or equal to 4.5 Å as measured on a silicon substrate. | 09-29-2011 |
20120036732 | SYSTEMS AND METHODS FOR AT LEAST PARTIALLY CONVERTING FILMS TO SILICON OXIDE AND/OR IMPROVING FILM QUALITY USING ULTRAVIOLET CURING IN STEAM AND DENSIFICATION OF FILMS USING UV CURING IN AMMONIA - Systems and methods for processing a substrate include supplying steam in a chamber, arranging a substrate with a deposited layer that includes silicon in the chamber, and directing UV light onto the deposited layer in the presence of the steam for a predetermined conversion period to at least partially convert the deposited layer. Systems and methods for densifying a deposited layer of a substrate include supplying ammonia in a chamber, arranging the substrate that includes the deposited layer in the chamber, and directing UV light onto the deposited layer in the presence of the ammonia for a predetermined conversion period to at least partially densify the deposited layer. | 02-16-2012 |
20120142172 | PECVD DEPOSITION OF SMOOTH POLYSILICON FILMS - Smooth silicon and silicon germanium films are deposited by plasma enhanced chemical vapor deposition (PECVD). The films are characterized by roughness (Ra) of less than about 4 Å. In some embodiments, smooth silicon films are undoped and doped polycrystalline silicon films. The dopants can include boron, phosphorus, and arsenic. In some embodiments the smooth polycrystalline silicon films are also highly conductive. For example, boron-doped polycrystalline silicon films having resistivity of less than about 0.015 Ohm cm and Ra of less than about 4 Å can be deposited by PECVD. In some embodiments smooth silicon films are incorporated into stacks of alternating layers of doped and undoped polysilicon, or into stacks of alternating layers of silicon oxide and doped polysilicon employed in memory devices. Smooth films can be deposited using a process gas having a low concentration of silicon-containing precursor and/or a process gas comprising a silicon-containing precursor and H | 06-07-2012 |
20120149213 | BOTTOM UP FILL IN HIGH ASPECT RATIO TRENCHES - Provided are novel methods of filling gaps with a flowable dielectric material. According to various embodiments, the methods involve performing a surface treatment on the gap to enhance subsequent bottom up fill of the gap. In certain embodiments, the treatment involves exposing the surface to activated species, such as activated species of one or more of nitrogen, oxygen, and hydrogen. In certain embodiments, the treatment involves exposing the surface to a plasma generated from a mixture of nitrogen and oxygen. The treatment may enable uniform nucleation of the flowable dielectric film, reduce nucleation delay, increase deposition rate and enhance feature-to-feature fill height uniformity. | 06-14-2012 |
20120276752 | HARDMASK MATERIALS - Hardmask films having high hardness and low stress are provided. In some embodiments a film has a stress of between about −600 MPa and 600 MPa and hardness of at least about 12 GPa. In some embodiments, a hardmask film is prepared by depositing multiple sub-layers of doped or undoped silicon carbide using multiple densifying plasma post-treatments in a PECVD process chamber. In some embodiments, a hardmask film includes a high-hardness boron-containing film selected from the group consisting of Si | 11-01-2012 |
20130040447 | CONFORMAL DOPING VIA PLASMA ACTIVATED ATOMIC LAYER DEPOSITION AND CONFORMAL FILM DEPOSITION - Disclosed herein are methods of doping a patterned substrate in a reaction chamber. The methods may include forming a first conformal film layer which has a dopant source including a dopant, and driving some of the dopant into the substrate to form a conformal doping profile. In some embodiments, forming the first film layer may include introducing a dopant precursor into the reaction chamber, adsorbing the dopant precursor under conditions whereby it forms an adsorption-limited layer, and reacting the adsorbed dopant precursor to form the dopant source. Also disclosed herein are apparatuses for doping a substrate which may include a reaction chamber, a gas inlet, and a controller having machine readable code including instructions for operating the gas inlet to introduce dopant precursor into the reaction chamber so that it is adsorbed, and instructions for reacting the adsorbed dopant precursor to form a film layer containing a dopant source. | 02-14-2013 |
20130171834 | IN-SITU DEPOSITION OF FILM STACKS - Disclosed herein are methods of forming a film stack which may include the plasma accelerated deposition of a silicon nitride film formed from the reaction of nitrogen containing precursor with silicon containing precursor, the plasma accelerated substantial elimination of silicon containing precursor from the processing chamber, the plasma accelerated deposition of a silicon oxide film atop the silicon nitride film formed from the reaction of silicon containing precursor with oxidant, and the plasma accelerated substantial elimination of oxidant from the processing chamber. Also disclosed herein are process station apparatuses for forming a film stack of silicon nitride and silicon oxide films which may include a processing chamber, one or more gas delivery lines, one or more RF generators, and a system controller having machine-readable media with instructions for operating the one or more gas delivery lines, and the one or more RF generators. | 07-04-2013 |
20130189854 | METHOD FOR DEPOSITING A CHLORINE-FREE CONFORMAL SIN FILM - Described are methods of making silicon nitride (SiN) materials on substrates. Improved SiN films made by the methods are also included. One aspect relates to depositing chlorine (Cl)-free conformal SiN films. In some embodiments, the SiN films are Cl-free and carbon (C)-free. Another aspect relates to methods of tuning the stress and/or wet etch rate of conformal SiN films. Another aspect relates to low-temperature methods of depositing high quality conformal SiN films. In some embodiments, the methods involve using trisilylamine (TSA) as a silicon-containing precursor. | 07-25-2013 |
20130230987 | FLOWABLE OXIDE FILM WITH TUNABLE WET ETCH RATE - Provided herein are integration-compatible dielectric films and methods of depositing and modifying them. According to various embodiments, the methods can include deposition of flowable dielectric films targeting specific film properties and/or modification of those properties with an integration-compatible treatment process. In certain embodiments, methods of depositing and modifying flowable dielectric films having tunable wet etch rates and other properties are provided. Wet etch rates can be tuned during integration through am integration-compatible treatment process. Examples of treatment processes include plasma exposure and ultraviolet radiation exposure. | 09-05-2013 |
20130341433 | DUAL PLENUM, AXI-SYMMETRIC SHOWERHEAD WITH EDGE-TO-CENTER GAS DELIVERY - A dual-plenum showerhead for semiconductor processing operations is provided. The showerhead may include a faceplate with two sets of gas distribution holes, each set fed by a separate plenum. One set of gas distribution holes may be through-holes in a faceplate of the showerhead and may allow gases trapped between the faceplate and a plasma dome to flow towards a wafer. The other set of gas distribution holes may distribute gas routed through passages or channels in the faceplate towards the wafer. The passages or channels in the faceplate may include radial channels and annular channels and may be fed from an annular gas distribution channel about the periphery of the faceplate. | 12-26-2013 |
20140020259 | SYSTEMS AND METHODS FOR AT LEAST PARTIALLY CONVERTING FILMS TO SILICON OXIDE AND/OR IMPROVING FILM QUALITY USING ULTRAVIOLET CURING IN STEAM AND DENSIFICATION OF FILMS USING UV CURING IN AMMONIA - A processing system includes a chamber and a steam source that supplies steam in the chamber. A UV source directs UV light onto a deposited layer of a substrate in the presence of the steam from the steam source for a predetermined conversion period to at least partially convert the deposited layer. | 01-23-2014 |
20140049162 | DEFECT REDUCTION IN PLASMA PROCESSING - Methods and apparatus to reduce particle-induced defects on a substrate are provided. In certain embodiments, the methods involve decreasing plasma spread prior to extinguishing the plasma. The plasma is maintained at the decreased plasma spread while particles are evacuated from the processing chamber. In certain embodiments, the methods involve decreasing plasma power prior to extinguishing the plasma. The low-power plasma is maintained while particles are evacuated from the processing chamber. | 02-20-2014 |
20140141626 | METHOD FOR DEPOSITING A CHLORINE-FREE CONFORMAL SIN FILM - Described are methods of making silicon nitride (SiN) materials on substrates. Improved SiN films made by the methods are also included. One aspect relates to depositing chlorine (Cl)-free conformal SiN films. In some embodiments, the SiN films are Cl-free and carbon (C)-free. Another aspect relates to methods of tuning the stress and/or wet etch rate of conformal SiN films. Another aspect relates to low-temperature methods of depositing high quality conformal SiN films. In some embodiments, the methods involve using trisilylamine (TSA) as a silicon-containing precursor. | 05-22-2014 |