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Barinder Singh Rai, Surrey CA

Barinder Singh Rai, Surrey CA

Patent application numberDescriptionPublished
20080212888Frame Region Filters - One embodiment is directed to a display controller that comprises: (a) a selecting circuit and (b) a filtering circuit. The selecting circuit selects pixels of a frame of image data that are within at least one region of the frame designated for filtering. The filtering circuit modifies the selected pixels according to a filtering operation specified for the filtering region in which the selected pixels are located. In addition, in one embodiment, the selecting circuit selects pixels that are within one of at least two filtering regions, and the filtering circuit modifies the selected pixels according to one of at least two distinct filtering operations. Other embodiments are directed to hardware implemented methods for filtering image data.09-04-2008
20080232710Varying The Exposure Of A Digital Image By Region - Methods and apparatus for creating a digital image in which exposure varies by region of the image are described. The image may be created from first and second images. In one embodiment, a method comprises writing pixels of the first image that are within a first region of a space to pixel locations in a memory that correspond with coordinates of the respective first image pixels. A replacement pixel is generated by combining a pixel of the first image that is within the first region with a spatially corresponding pixel of a second image. The replacement pixel is written to a pixel location in the memory that corresponds with the coordinates of the replacement pixel. Pixels of the first image that are within a second region of the space may be written to pixel locations in the memory that correspond with the coordinates of the respective first image pixels.09-25-2008
20080239157Memory Efficient Gamma Correction For Multiple Display Devices - One embodiment is directed to a gamma correction unit. The gamma correction unit includes a first and at least one second lookup table. In addition, the gamma correction unit includes a first and at least one second selecting circuits, and at least one combining circuit. The first lookup table may store a reference function. Each reference function value may be M bits. The first selecting circuit selects a reference function value in the first lookup table that corresponds with a particular input value. The at least one second lookup table may store a difference function. Each difference function value may be no more than N bits, where M is greater than N. The at least one second selecting circuit selects a difference function value in the second lookup table that corresponds with the particular input value. The at least one combining circuit combines the selected reference function value with the selected difference function value to produce an output value that corresponds with the particular input value.10-02-2008
20080252647Method And Apparatus For Bandwidth Corruption Recovery - A graphics processor is provided. The graphics processor includes a memory storing image data for presentation and a display memory region in communication with the memory, the display memory region supplying image data to a display panel for presentation. The graphics processor includes bandwidth control logic configured to monitor a lag between an output from the display memory region and an input into the display memory region. The bandwidth control logic is further configured to prevent a level of the display memory from decrementing when the lag between the output and the input is capable of causing corruption on the display panel due to a lack of data from the display memory region. A method for avoiding a buffer under run and a device are included.10-16-2008
20080252648Method And Apparatus For Providing Bandwidth Priority - A memory for a graphics processor is provided. The memory includes a write first-in-first-out (FIFO) region of the memory for receiving pixel data, and a read FIFO region for accessing the pixel data received into the memory through the write FIFO. The memory has a memory controller having write assembly logic for rearranging the pixel data received by the write FIFO for storage in the memory. The write assembly logic is configured to write data representing a first pixel and a second pixel across a plurality of data segments in the memory, where corresponding bit locations for the data representing the first pixel and the data representing the second pixel are contiguous. A graphics controller having the memory and a method for preventing data corruption from being displayed during an underflow are included.10-16-2008
20080252649Self-Automating Bandwidth Priority Memory Controller - A memory controller that includes a write first in first out (FIFO) region of the memory for receiving pixel data and a read FIFO region of the memory for accessing the pixel data received through the write FIFO is provided. The memory controller is configured to rearrange the pixel data received by the write FIFO for storage in the memory by writing data representing a first pixel and a second pixel across a plurality of registers in the memory, wherein corresponding bit locations for the data representing the first pixel and the data representing the second pixel are stored within a same one of the plurality of registers. The memory controller is configured to grant access to one of multiple requests for access to the memory based on corresponding bit locations associated with the multiple requests. A graphics controller and a method for prioritizing access to a memory are provided.10-16-2008
20080285868Simple Adaptive Wavelet Thresholding - A method for processing an image is described. In the method, image data representing an image into a memory device. The image data is filtered to obtain a plurality of coefficients representing low and high frequency image data. An area of low frequency data corresponding to one of the coefficients is analyzed to identify a degree of edginess of the region. A threshold is obtained, the threshold varying depending on the degree of edginess. If the coefficient is less than the threshold, it is reduced to zero. Wavelet-based image compression can then be performed on the image using the reduced coefficients.11-20-2008
20080297525Method And Apparatus For Reducing Accesses To A Frame Buffer - An apparatus comprises a first unit to receive a first frame. The first unit replaces each datum of the first frame with a datum having a particular value if the datum of the first frame is within a region of the first frame. A second frame is thereby created. The first unit also writes the second frame.12-04-2008
20080310751Method And Apparatus For Providing A Variable Blur - A de-noising circuit for filtering image data is provided. The denoising circuit includes a buffer for storing a portion of the image data and detail detection circuitry configured to determine a filter coefficient to be applied to a reference pixel value within the portion of the image data. A blur filter configured to average values within the portion of the image data is included. The blur filter repeats the reference pixel value as specified by the filter coefficient to generate blurred image data. Selection circuitry configured to select between the blurred image data and the unfiltered image data based on a selection signal from the detail detection circuitry is included. A method for filtering image data and a device are also included.12-18-2008
20090073464Selective Color Replacement - One embodiment is directed to a method that includes inspecting a frame of image data transmitted as a stream of pixels. At least one of the pixels in the stream is selected and the color of selected pixels is changed. The steps of inspecting, selecting, and changing the color of selected pixels may be performed as the data is transmitted. The frame may be transmitted for storing in a memory and the steps may be performed as the frame is stored in the memory. Alternatively, the frame may be transmitted from a memory and the steps may be performed as the frame is fetched from in the memory. The selected pixels may be pixels within a particular region of the frame or the selected pixels may have a particular color component value.03-19-2009
20090077273Control Data Transfer - An N-bit control word may be parsed into individual control bits and the individual bits may be inserted into the least significant bit (“LSB”) of N data words. The respective LSBs of the N data words may be mapped into particular bit positions of a control register. When a device receives the N data words, the respective LSBs of the N data may be stored in their designated bit position of the control register. The sender need not specify the address of the control register.03-19-2009
20090154824Efficient Filtering of Image Data - Systems and methods for efficiently applying a filter to image data are disclosed. For efficiently applying the filter, a filter type including coefficient values for each pixel in the image data is identified. A sub-matrix corresponding to the size of the filter is selected in the image data. The sub-matrix includes the plurality of pixels that can be represented in a 206-18-2009
20100013959Efficient Generation Of A Reflection Effect - In one embodiment, a method generates an output image having a reflection special effect at the time of capture of an original image having a first area. The output image is generated using a memory having a capacity limited to storing a single image and a buffer having a capacity limited to storing one line of the original image. The first area of the original image is stored in the memory at memory locations corresponding with an unmodified region of the output image and in the buffer. Modified pixels and addresses are generated. The modified pixels are stored in the memory. Each modified pixel is generated from one or more pixels of the first area stored in the buffer. Addresses for storing each modified pixel are generated according to a reflection mapping function and an offset mapping function. The output image is fetched from memory and rendered.01-21-2010
20100061650Method And Apparatus For Providing A Variable Filter Size For Providing Image Effects - A de-noising circuit for filtering image data is provided. The de-noising circuit includes a buffer for storing a portion of the image data and detail detection circuitry configured to determine a filter size. The determined filter size is then applied to a captured image to improve the quality of the image by smoothing transitions within the image. To determine an appropriate filter size, a comparison is made between a sum of differences between a center pixel value within a first pixel matrix size and all of the remaining values within the first pixel matrix size, and a threshold range value. The threshold range value corresponds to a specific filter size. Various filter sizes are provided allowing for different smoothing effects, depending on the filter size used. Selection circuitry configured to select between either unfiltered data, or filtered data using one of various sizes of filters based on a selection signal from the detail detection circuitry is included.03-11-2010
20100119153Shadow Remover - A method and apparatus for removing shadows from image data is provided. The apparatus includes image capture circuitry and a graphics processor. The apparatus also includes shadow remover circuitry in communication with the image capture circuitry and the graphics processor. The shadow remover circuitry includes shadow remover location circuitry configured to identify shadow image data and shadow correction circuitry configured to selectively apply a smoothing function to the shadow image data based on a value of the shadow image data. The shadow correction circuitry is configured to select between smoothed shadow image data and a value representing an average of neighboring pixel values of non-shadow image data. A display to present an output of the shadow remover circuitry is also included.05-13-2010

Patent applications by Barinder Singh Rai, Surrey CA