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Baker, San Diego
Denise Marie Baker, San Diego, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090304746 | Inducing cellar immune responses to hepatitis C virus using peptide and nucleic acid compositions - This invention uses our knowledge of the mechanisms by which antigen is recognized by T cells to identify and prepare HCV epitopes, and to develop epitope-based vaccines directed towards HCV. More specifically, this application communicates our discovery of pharmaceutical compositions and methods of use in the prevention and treatment of HCV infection. | 12-10-2009 |
| 20100049491 | Method and System for Optimizing Minigenes and Peptides Encoded Thereby - The invention relates to the field of biology. In particular, the invention relates to a method and system for designing optimized multi-epitope vaccines having selected combinations of amino acid insertions at the junctions of the multi-epitope constructs so as to minimize the number of junctional epitopes and provide vaccines with increased immunogenicity. | 02-25-2010 |
Jim Baker, San Diego, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100279763 | METHOD AND APPARATUS FOR ENHANCING A WAGERING EXPERIENCE USING A WAGERING TERMINAL ADAPTABLE TO A SELF-SERVICE MODE - A method and apparatus for use in a wagering environment are disclosed. An exemplary embodiment of the present invention comprises a wagering terminal including a processor, a memory, a primary display, and a secondary display. The primary display is configured for displaying visual messages. These visual messages are displayed as part of a graphical user interface and include at least one wagering transaction message. The secondary display is configured for displaying additional visual messages associated with the visual messages of the primary display. These additional visual messages are displayed as part of an additional graphical user interface. The wagering terminal may further include a proximity detector configured for detecting the presence of a gaming patron, a user identification unit configured for sampling a unique physical attribute of a user, and an image capture unit configured for capturing at least one image in a vicinity of the wagering terminal. | 11-04-2010 |
Shawn Christopher Baker, San Diego, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090215649 | ARRAY KITS AND PROCESSING SYSTEMS - The invention relates to sensor compositions comprising a composite array of individual arrays, to allow for simultaneous processing of a number of samples. The invention further provides methods of making and using the composite arrays. The invention further provides a hybridization chamber for use with a composite array. | 08-27-2009 |
| 20090221450 | METHODS OF MAKING ARRAYS - The invention relates to sensor compositions comprising a composite array of individual arrays, to allow for simultaneous processing of a number of samples. The invention further provides methods of making and using the composite arrays. The invention further provides a hybridization chamber for use with a composite array. | 09-03-2009 |
| 20090298716 | COMPOSITE ARRAYS UTILIZING MICROSPHERES WITH A HYBRIDIZATION CHAMBER - The invention relates to sensor compositions comprising a composite array of individual arrays, to allow for simultaneous processing of a number of samples. The invention further provides methods of making and using the composite arrays. The invention further provides a hybridization chamber for use with a composite array. | 12-03-2009 |
Simon Baker, San Diego, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100150165 | METHOD AND SYSTEM FOR HSDPA BIT LEVEL PROCESSOR ENGINE - A method for processing signals in a communication system is disclosed and may include pipelining processing of a received HSDPA bitstream within a single chip. The pipelining may include calculating a memory address for a current portion of a plurality of information bits in the received HSDPA bitstream, while storing on-chip, a portion of the plurality of information bits in the received HSDPA bitstream that is subsequent to the current portion. A portion of the plurality of information bits in the received HSDPA bitstream that is previous to the current portion may be decoded during the calculating and storing. The calculation of the memory address for the current portion of the plurality of information bits may be achieved without the use of a buffer. Processing of the plurality of information bits in the received HSDPA bitstream may be partitioned into a functional data processing path and functional address processing path. | 06-17-2010 |
| 20110085493 | METHOD AND SYSTEM FOR CONTINUOUS PACKET CONNECTIVITY - A UE receives HSDPA traffic comprising legacy HSDPA traffic and HS-SCCH-less HSDPA traffic. The UE concurrently processes the received legacy HSDPA traffic and the received HS-SCCH-less HSDPA traffic. The received HSDPA traffic is concurrently buffered into a first storage and a second storage to support simultaneously receiving legacy HSDPA traffic and HS-SCCH-less HSDPA traffic. A HARQ process is performed on the buffered HSDPA traffic in the first storage or the second storage according to a corresponding HS-SCCH CRC test. The resulting HARQ processed HSDPA traffic is Turbo decoded. Turbo decoding on the previously HARQ processed HSDPA traffic is performed simultaneously with HARQ processing on the buffered HSDPA traffic in the first storage or the second storage. The buffered HS-SCCH-less HSDPA traffic is processed via HARQ processing and Turbo decoding for each of the four pre-determined transport formats. | 04-14-2011 |
| 20110149883 | METHOD AND SYSTEM FOR CONCURRENTLY LOCATING SYSTEMATIC BITS AND PARITY BITS IN PHYSICAL CHANNEL MEMORY TO INCREASE HARQ PROCESSING SPEED IN 3GPP CPC SYSTEM - A UE receives a HS-PDSCH transmission from a base station and concurrently performs rate matching on systematic bits and parity bits (parity 1 bits, parity 2 bits) of the received HS-PDSCH transmission. The systematic bits and parity bits are buffered in a CPC circular buffer to support HARQ processing in a HS-SCCH-less operation of the base station. Memory locations are computed for the systematic bits and the parity bits according to corresponding transmission parameters such as, for example, redundancy version, number of systematic bits and/or number of physical channels. The systematic bits and the parity bits are stored in the corresponding computed memory locations of the CPC circular buffer. At least a portion of the stored systematic bits and parity bits are concurrently generated based on corresponding transmission parameters from the CPC circular buffer per request to support concurrent rate matching on systematic bits and parity bits. | 06-23-2011 |