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Baik, Suwon-Si
Chang-Hyun Baik, Suwon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090196383 | CORRELATION APPARATUS AND METHOD FOR FREQUENCY SYNCHRONIZATION IN BROADBAND WIRELESS ACCESS COMMUNICATION SYSTEM - A correlation apparatus and method for frequency synchronization are provided. A frequency synchronization method of a receiver in a broadband wireless access communication system includes acquiring a highest correlation value by conducting a differential correlation of a variable interval between a received signal and a reference signal and performing a frequency synchronization according to the highest correlation value. | 08-06-2009 |
| 20100004929 | APPARATUS AND METHOD FOR CANCELING NOISE OF VOICE SIGNAL IN ELECTRONIC APPARATUS - An apparatus and a method for canceling noise in a voice signal in an electronic apparatus are provided. The apparatus includes a Generalized Sidelobe Canceller (GSC) and a decision unit. The GSC cancels noise components from signals with different phases input via a plurality of microphones. The decision unit estimates a Signal-to-Noise Ratio (SNR) of an input signal to determine a step-size of a filter included in the GSC. | 01-07-2010 |
Doo Go Baik, Suwon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090311817 | VERTICAL NITRIDE SEMICONDUCTOR LIGHT EMITTING DIODE AND METHOD OF MANUFACTURING THE SAME - A vertical nitride-based semiconductor LED comprises a structure support layer; a p-electrode formed on the structure support layer; a p-type nitride semiconductor layer formed on the p-electrode; an active layer formed on the p-type nitride semiconductor layer; an n-type nitride semiconductor layer formed on the active layer; an n-electrode formed on a portion of the n-type nitride semiconductor layer; and a buffer layer formed on a region of the n-type nitride semiconductor layer on which the n-electrode is not formed, the buffer layer having irregularities formed thereon. The surface of the n-type nitride semiconductor layer coming in contact with the n-electrode is flat. | 12-17-2009 |
| 20110033965 | VERTICAL NITRIDE SEMICONDUCTOR LIGHT EMITTING DIODE AND METHOD OF MANUFACTURING THE SAME - A vertical nitride-based semiconductor LED comprises a structure support layer; a p-electrode formed on the structure support layer; a p-type nitride semiconductor layer formed on the p-electrode; an active layer formed on the p-type nitride semiconductor layer; an n-type nitride semiconductor layer formed on the active layer; an n-electrode formed on a portion of the n-type nitride semiconductor layer; and a buffer layer formed on a region of the n-type nitride semiconductor layer on which the n-electrode is not formed, the buffer layer having irregularities formed thereon. The surface of the n-type nitride semiconductor layer coming in contact with the n-electrode is flat. | 02-10-2011 |
| 20110053298 | VERTICAL NITRIDE SEMICONDUCTOR LIGHT EMITTING DIODE AND METHOD OF MANUFACTURING THE SAME - A vertical nitride-based semiconductor LED comprises a structure support layer; a p-electrode formed on the structure support layer; a p-type nitride semiconductor layer formed on the p-electrode; an active layer formed on the p-type nitride semiconductor layer; an n-type nitride semiconductor layer formed on the active layer; an n-electrode formed on a portion of the n-type nitride semiconductor layer; and a buffer layer formed on a region of the n-type nitride semiconductor layer on which the n-electrode is not formed, the buffer layer having irregularities formed thereon. The surface of the n-type nitride semiconductor layer coming in contact with the n-electrode is flat. | 03-03-2011 |
Hyun-Su Baik, Suwon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20110084925 | IMAGE FORMING APPARATUS TO DISPLAY ICONS REPRESENTING FUNCTIONS, AND ICON DISPLAY METHOD THEREOF - An icon display method of an image forming apparatus is provided which includes receiving an input regarding whether to change a display of an icon representing a function supported by the image forming apparatus, receiving a selection of at least one icon to be changed in display, from among a plurality of icons displayed on a graphical user interface (GUI), receiving an input of modification attributes for the at least one selected icon, storing the received modification attributes, and displaying the at least one selected icon on the GUI, and moving the at least one selected icon in the GUI according to the stored modification attributes. Therefore, it is possible to promote user conveniences. | 04-14-2011 |
Jae-Sang Baik, Suwon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090129041 | Stacked semiconductor module, method of fabricating the same, and electronic system using the same - A stacked semiconductor module, a method of fabricating the same, and an electronic system using the module are provided. A first semiconductor module having a plurality of semiconductor devices mounted on a rigid printed circuit board (PCB) and a second semiconductor module having a plurality of other semiconductor devices mounted on a flexible PCB are provided. On the rigid PCB a number L of first tabs may be disposed on a first surface, and a number K of second tabs may be disposed on a second surface of the rigid PCB. The flexible PCB may have a number M of third tabs on a third surface, and a number N of fourth tabs on a fourth surface of the flexible PCB. The second tabs may be combined with the third tabs using a conductive adhesive. The third tabs may be electrically connected to corresponding ones of the second tabs. | 05-21-2009 |
Jong-Min Baik, Suwon-Si KR
Kwang-Hyeon Baik, Suwon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090095981 | Complementary metal oxide semiconductor device and method of manufacturing the same - Provided are a complementary metal oxide semiconductor (CMOS) device and a method of manufacturing the same. The CMOS device comprises an epi-layer that may be formed on a substrate; a first semiconductor layer and a second semiconductor layer that may be formed on different regions of the epi-layer, respectively; and a PMOS transistor and a NMOS transistor that may be formed on the first and second semiconductor layers, respectively. | 04-16-2009 |
| 20100136790 | Method of fabricating semiconductor integrated circuit device - A method of fabricating a semiconductor integrated circuit device, including providing a semiconductor substrate, sequentially forming an etching target layer and a hard mask layer on the semiconductor substrate, forming first etch masks on the hard mask layer, the first etch masks including a plurality of first line patterns spaced apart from one another at a first pitch and extending in a first direction, forming first hard mask patterns by etching the hard mask layer using the first etch masks, forming second etch masks on the first hard mask patterns, the second etch masks including a plurality of second line patterns spaced apart from one another at a second pitch and extending in a second direction different from the first direction, forming second hard mask patterns by etching the first hard mask patterns using the second etch masks, forming spacers on sidewalls of the second hard mask patterns, and patterning the etching target layer using the second hard mask patterns having the spacers. | 06-03-2010 |
Seung-Hyun Baik, Suwon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20110198542 | Conductive carbon nanotube-metal composite ink - An electrically conductive carbon nanotube-metal composite ink may include a carbon nanotube-metal composite in which metal nanoparticles are bound to a surface of a carbon nanotube by chemical self-assembly. The electrically conductive carbon nanotube-metal composite ink may have higher electrical conductivity than a commonly used metal nanoparticles-based conductive ink, and may also be used in deformable electronic devices that are flexible and stretchable, as well as commonly used electronic devices, due to the bending and stretching properties of the carbon nanotube itself. | 08-18-2011 |
Yoon-Ah Baik, Suwon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20100146777 | SURFACE TREATMENT METHOD, CIRCUIT LINES FORMATION METHOD, CIRCUIT LINES FORMATION APPARATUS, AND PRINTED CIRCUIT BOARD FORMED THEREBY - The present invention relates to a method of surface treatment, a method for forming circuit lines, a printed circuit board formed thereby, and an apparatus for forming circuit lines on a substrate, wherein fine circuit lines are formed simply, rapidly, and economically. The method for forming circuit lines of the present invention comprises: (a) selectively applying a surface treatment solution which includes an alkali metal compound on a base film in accordance with circuit patterns by a discharging method; (b) applying a conductive ink which includes metal nanoparticles in accordance with the surface-treated circuit pattern; and (c) curing the base film on which the conductive ink is applied under a reduction atmosphere lines. | 06-17-2010 |
| 20100149249 | SURFACE TREATMENT METHOD, CIRCUIT LINES FORMATION METHOD, CIRCUIT LINES FORMATION APPARATUS, AND PRINTED CIRCUIT BOARD FORMED THEREBY - The present invention relates to a method of surface treatment, a method for forming circuit lines, a printed circuit board formed thereby, and an apparatus for forming circuit lines on a substrate, wherein fine circuit lines are formed simply, rapidly, and economically. The method for forming circuit lines of the present invention comprises: (a) selectively applying a surface treatment solution which includes an alkali metal compound on a base film in accordance with circuit patterns by a discharging method; (b) applying a conductive ink which includes metal nanoparticles in accordance with the surface-treated circuit pattern; and (c) curing the base film on which the conductive ink is applied under a reduction atmosphere lines. | 06-17-2010 |