| Patent application number | Description | Published |
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| 20080299469 | LIQUID CRYSTAL DISPLAY PANEL AND LIQUID CRYSTAL DISPLAY APPARATUS HAVING THE SAME - A liquid crystal display panel includes a first substrate, a second substrate opposite the first substrate and a liquid crystal layer. The first substrate includes a lower substrate, a first buffer layer formed on the lower substrate and a first alignment layer formed on the first buffer layer. The first buffer layer includes a polymer-like carbon and the first alignment layer includes a diamond-like carbon thin film containing fluorine. The second substrate includes an upper substrate, a second buffer layer formed on the upper substrate and a second alignment layer formed on the second buffer layer. The second buffer layer includes the polymer-like carbon thin film and the second alignment layer includes the diamond-like carbon thin film containing fluorine. The liquid crystal display panel has improved light transmittance and a low probability of separation between the alignment layer and the substrate. | 12-04-2008 |
| 20100053513 | Method of Manufacturing a Display Substrate, a Display Substrate Manufactured According to the Method, and a Method for Manufacturing a Display Device Having the Display Substrate - In a method of manufacturing a display substrate, a color filter is formed on a first substrate including a switching element. A pixel electrode is formed on the first substrate including the color filter. An inorganic alignment layer including an inorganic compound is formed on the first substrate including the pixel electrode. Thus, impurities generated from the color filter may be blocked from flowing into a liquid crystal layer, and liquid crystal molecules of the liquid crystal layer may be aligned by the inorganic layer. | 03-04-2010 |
| 20110309323 | METHOD OF MANUFACTURING NANO DEVICE BY ARBITRARILY PRINTING NANOWIRE DEVICES THEREON AND INTERMEDIATE BUILDING BLOCK USEFUL FOR THE METHOD - A method of manufacturing a nano device by directly printing a plurality of NW devices in a desired shape on a predesigned gate substrate. The method includes preparing an NW solution, preparing a building block for performing decaling onto the substrate by carrying an NW device, forming the NW device by connecting electrodes of each of building block units of the building block using NWs by dropping the NW solution between the electrodes and then through dielectrophoresis, visually inspecting the numbers of NW bridges that are formed between the electrodes of each of the building block units through the dielectrophoresis, grouping the building block units according to the numbers, and decaling the NW device formed on each of the building block units onto the gate substrate by bringing the grouped building block units into contact with the predesigned gate substrate and then detaching the grouped building block units. | 12-22-2011 |
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| 20080246067 | Dram device and method of manufacturing the same - In a DRAM device and a method of manufacturing the same, a multiple tunnel junction (MTJ) structure is provided, which includes conductive patterns and nonconductive patterns alternately stacked on each other. The nonconductive patterns have a band gap larger than a band gap of the conductive patterns. A gate insulation layer and a gate electrode are formed on a sidewall of the MTJ structure. A word line is connected with the MTJ structure, and a bit line is connected with one of top and bottom surfaces of the MTJ structure. A capacitor is connected with one of top and bottom surfaces of the MTJ structure that is not connected with the bit line. Current leakage in the DRAM device is reduced and a unit cells may be vertically stacked on the substrate, so a smaller surface area of the substrate is required for the DRAM device. | 10-09-2008 |
| 20090014781 | Nonvolatile memory devices and methods for fabricating nonvolatile memory devices - A nonvolatile memory device may include: a tunnel insulating layer on a semiconductor substrate; a charge storage layer on the tunnel insulating layer; a blocking insulating layer on the charge storage layer; and a control gate electrode on the blocking insulating layer. The tunnel insulating layer may include a first tunnel insulating layer and a second tunnel insulating layer. The first tunnel insulating layer and the second tunnel insulating layer may be sequentially stacked on the semiconductor substrate. The second tunnel insulating layer may have a larger band gap than the first tunnel insulating layer. A method for fabricating a nonvolatile memory device may include: forming a tunnel insulating layer on a semiconductor substrate; forming a charge storage layer on the tunnel insulating layer; forming a blocking insulating layer on the charge storage layer; and forming a control gate electrode on the blocking insulating layer. | 01-15-2009 |
| 20090045448 | Non-volatile memory device and methods of forming the same - Example embodiments provide a non-volatile memory device and methods of forming the same. The non-volatile memory device may define an active region in a semiconductor substrate, and may include a device isolation layer extending in a first direction, bit lines in the semiconductor substrate, the bit lines extending in a second direction which intersects the first direction; word lines extending in the first direction and covering the active region; and charge storage patterns between the word lines and active region, wherein the charge storage patterns may be in pairs on both edges of the bit lines, and a pair of charge storage patterns may be spaced apart from each other by the word lines. | 02-19-2009 |
| 20090114904 | SEMICONDUCTOR DEVICES HAVING NANO-LINE CHANNELS - A semiconductor device includes a substrate, a gate electrode on the substrate and source and drain electrodes disposed at respective sides of the gate electrode. The device further includes a nano-line passing through the gate electrode and extending into the source and drain electrodes and having semiconductor characteristics. The nano-line may include a nano-wire and/or a nano-tube. A gate insulating layer may be interposed between the nano-line and the gate electrode. The source and drain electrodes may be disposed adjacent respective opposite sidewalls of the gate electrode, and the gate insulating layer may be further interposed between the source and drain electrodes and the gate electrode. Fabrication methods for such devices are also described. | 05-07-2009 |
| 20090134451 | Semiconductor device and method of fabricating the same - An example embodiment of a non-volatile memory device and an example embodiment of a method of fabricating the same are provided. The non-volatile memory devices includes a tunnel insulation layer on a semiconductor substrate, a charge storage layer on the tunnel insulation layer, a blocking insulation layer including at least one nano dot on the charge storage layer, and a control gate electrode on the blocking insulation layer. | 05-28-2009 |
| 20100254969 | Cosmetic Composition For Exfoliating Skin Keratin - The present invention relates to a cosmetic composition containing enzymes, and more particularly to a cosmetic composition, which contains, as active ingredients, 1) papain, and 2) at least one selected from the group consisting of theanine and N-acetyl glucosamine, and thus functions to control the skin turnover cycle and promote the exfoliation of skin keratin. | 10-07-2010 |
| 20110237059 | Non-volatile memory devices with multiple layers having band gap relationships among the layers - A nonvolatile memory device may include: a tunnel insulating layer on a semiconductor substrate; a charge storage layer on the tunnel insulating layer; a blocking insulating layer on the charge storage layer; and a control gate electrode on the blocking insulating layer. The tunnel insulating layer may include a first tunnel insulating layer and a second tunnel insulating layer. The first tunnel insulating layer and the second tunnel insulating layer may be sequentially stacked on the semiconductor substrate. The second tunnel insulating layer may have a larger band gap than the first tunnel insulating layer. A method for fabricating a nonvolatile memory device may include: forming a tunnel insulating layer on a semiconductor substrate; forming a charge storage layer on the tunnel insulating layer; forming a blocking insulating layer on the charge storage layer; and forming a control gate electrode on the blocking insulating layer. | 09-29-2011 |
| 20120061752 | SINGLE TRANSISTOR FLOATING-BODY DRAM DEVICES HAVING VERTICAL CHANNEL TRANSISTOR STRUCTURES - Single transistor floating-body DRAM devices have a vertical channel transistor structure. The DRAM devices include a substrate, and first and second floating bodies disposed on the substrate and isolated from each other. A source region and a drain region are disposed under and above each of the first and second floating bodies. A gate electrode is disposed between the first and second floating bodies. Methods of fabricating the single transistor floating-body DRAM devices are also provided. | 03-15-2012 |
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| 20080280135 | DC PLASMA ASSISTED CHEMICAL VAPOR DEPOSITION APPARATUS IN THE ABSENCE OF POSITIVE COLUMN, METHOD FOR DEPOSITING MATERIAL IN THE ABSENCE OF POSITIVE COLUMN, AND DIAMOND THIN LAYER THEREBY - Disclosed are DC plasma assisted chemical vapor deposition (DC PA-CVD) apparatus operable in the absence of a positive column, a method for depositing a material by DC PA-CVD in the absence of a positive column, and a diamond thin film fabricated thereby. In the method for depositing a material in the absence of a positive column, a discharge is generated between a cathode and an anode disposed to face each other in a reaction chamber by applying a DC voltage therebetween, and introducing reaction gas into the reaction chamber, thereby depositing a material on a substrate mounted on the anode and serving as a part of the anode, wherein the deposition of the material on the substrate is performed under a state that a cathode glow and an anode glow exist in a form of thin layers coating respectively the surfaces of the cathode and the substrate, while a positive column does not exist or is so small as to be negligible. The diamond thin film fabricated by the method is uniform, contains no impurity, and has excellent crystallinity. | 11-13-2008 |
| 20090074986 | METHOD OF PREVENTING ABNORMAL LARGE GRAINS FROM BEING INCLUDED INTO THIN NANO-CRYSTALLINE DIAMOND FILM - The present invention relates to a method of preventing abnormal large grains from being included in a NCD thin film during a hot filament CVD process by appropriately controlling the deposition condition regarding a temperature-measuring means, a deposition pressure, an electrical potential and/or the composition of a raw material gas flow. | 03-19-2009 |
| 20090127102 | PLASMA DEPOSITION APPARATUS AND METHOD - A plasma deposition apparatus includes a cathode assembly including a cathode disk and a water-coolable cathode holder supporting the cathode disk, an anode assembly including a water-coolable anode holder, a substrate mounted on the anode holder to serve as an anode, and a substrate holder mounting and supporting the substrate, and a reactor for applying a potential difference between opposing surfaces of the cathode assembly and the anode assembly under a vacuum state to form plasma of a raw gas. The cathode disk comes into thermal contact with the cathode holder using at least one of a self weight and a vacuum absorption force so as to permit thermal expansion of the cathode disk. | 05-21-2009 |
| 20090324824 | METHOD FOR GROWING THIN FILM - Disclosed is a method for growing a thin film, which includes modifying a surface grain size and surface roughness on a thin film to improve the mobility of a carrier and a light scattering effect. The method for growing a thin film includes: forming nuclei of grains having various grain orientations on a substrate; causing first grains having a first specific grain orientation to grow predominantly among the grains having various grain orientations, thereby forming a first preferred texture comprised of the predominantly grown first grains; and then causing second grains having a second grain orientation to grow predominantly, thereby forming a second preferred texture comprised of the predominantly grown second grains, wherein the surface grain size of each of the second grains forming the second texture is larger than that of each of the first grains forming the first texture. | 12-31-2009 |
| 20100065892 | Bio-sensor and method of manufacturing the same - A bio-sensor includes a gate dielectric formed on a silicon semiconductor substrate, a gate electrode of a conductive diamond film formed on the gate dielectric, probe molecules bonded on the gate electrode for detecting biomolecules, and source/drain regions formed on the semiconductor substrate at the sides of the gate electrode. The gate electrode is a comb shape or a lattice shape. | 03-18-2010 |
| 20110223332 | METHOD FOR DEPOSITING CUBIC BORON NITRIDE THIN FILM - The present invention relates to a method for depositing a cBN thin film on a substrate to obtain an abrasive material by physical vapor deposition carried out under an atmosphere composed of an inert gas and hydrogen. The abrasive produced by the inventive method comprises the cBN thin film attached firmly to the substrate, which has excellent hardness and durability. | 09-15-2011 |
