Patent application number | Description | Published |
20100289746 | INPUT SYSTEM, PORTABLE TERMINAL, DATA PROCESSOR, AND INPUT METHOD - An input system, a portable terminal, a data processor, and an input method are provided that can be used to easily input a character of the type permitted to be input. The input system includes the data processor and the portable terminal. The data processor stores an input permitted character type that is a type of characters permitted to be input to a corresponding one of not less than one input box, in association with the corresponding input box. The data processor transmits to the portable terminal the input permitted character type associated with a character input enabled input box. The portable terminal sets the type of characters to be input, to the input permitted character type as received, and transmits to the data processor an input character that is of the input permitted character type as set. | 11-18-2010 |
20110088067 | BOOKING CONTROL APPARATUS, BOOKING EXECUTION APPARATUS, BOOKING CONTROL SYSTEM, AND BOOKING CONTROL METHOD - A remote controlling apparatus ( | 04-14-2011 |
20120015641 | CONTROL SYSTEM, MOBILE TERMINAL DEVICE, CONTROLLED DEVICE, CONTROL METHOD, AND COMPUTER-READABLE NON-TRANSITORY RECORDING MEDIUM STORING CONTROL PROGRAM - Provided are a control system, a mobile terminal device, a controlled device, a control method, and a computer-readable non-transitory recording medium storing a control program which are capable of reducing misoperations by a user. The mobile terminal device of the control system includes an instruction determining unit for determining specifics of an instruction based on a signal from an input unit, according to a current operating mode of either a first mode (controlled-device operating mode) or a second mode (terminal-itself operating mode), a process executing unit for executing a process corresponding to determined specifics of an instruction when in the second operating mode, a change determining unit for determining whether or not the operating mode is changed from the first mode to the second mode, and an informing process unit for performing a process of informing of a change in operating mode by at least one of vibration, light, and, sound if it is determined that a change in operating mode is made. | 01-19-2012 |
20140293235 | PROJECTOR DEVICE AND HEAD-UP DISPLAY DEVICE - A projector device includes a plurality of light source that emits lights of mutually differing colors. The projector device displays a projected image by scanning the lights emitted by the plurality of light sources, and further includes an optical axis misalignment detector that detects a degree of optical axis misalignment among the plurality of light sources, and a correction unit that corrects a timing of the emission of the plurality of light sources to minimize the degree of optical axis misalignment among the plurality of light sources. | 10-02-2014 |
20140293236 | PROJECTOR AND HEAD-UP DISPLAY DEVICE AND A PROJECTOR CONTROL METHOD - A projector includes a light generator that emits a first light and a second light of mutually differing color components, a light position detector disposed to receive light incident in a direction outside of the projection surface and that detects a position of the incident light, a light scanner that projects the image onto the projection surface by scanning the first light and the second light with a first scanning angle, and that directs the first light and the second light to the light position detector by scanning the first light and the second light with a second scanning angle that is larger than the first scanning angle, and an adjustor that adjusts an emission timing of the first light and an emission timing of the second light so as to suppress relative misalignment between the first light and the second light on the projection surface. | 10-02-2014 |
Patent application number | Description | Published |
20090166352 | Heating Apparatus - An apparatus for efficient heating liquids or gases comprising of a transformer having a primary and secondary winding wherein the secondary winding forms a shorted heating element having a resistance in the range of 1.6730 μΩ·cm to 185μΩ·cm, permitting liquid or gas to pass therethrough, whereby the liquid or gas is heated and heat transfer may be optionally facilitated through use of disc filters disposed within said heating element promoting turbulent flow which aids in mixing and more efficient thermal transfer. In an alternative embodiment, the heating element is not the secondary winding but another portion of the circuit on the alienation side of the transformer. The heating element may be comprised of a variety of sizes, shapes, and materials. In an alternative embodiment, the alienation side of the transformer may have a reverse winding which cancels reactive currents generated in the secondary winding. | 07-02-2009 |
20110162863 | LIGHTNING PROTECTION SYSTEM AND METHOD - An omnidirectional, external, lightning protection system which serves to minimize damage from lightning current and lightning electromagnetic impulse (LEMP). Embodiments of the present invention disclose a variety of individual structural components which may be rapidly assembled to form an air termination system, down conductor system, and earth termination system, according to established standards of lightning protection. The apparatus may be erected to protect a structure, area, or equipment and dismantled to its components parts when no longer required. The assembled structure may serve as a temporary or permanent protective structure. | 07-07-2011 |
20120001409 | AIRBAG DEVICE - An inflator that supplies gas in the event of a vehicle emergency and a curtain airbag that is inflated and deployed by gas introduction from the inflator are included. The curtain airbag includes an airbag body obtained by sewing a pair of base cloths together. The airbag body has, in the portion in which the gas is introduced from the inflator, a sewn part obtained by sewing a pair of edges of the base cloths. The airbag body further includes a protective cloth sewn to each of the pair of edges along the sewn part such that the sewn part is covered from the inside of the airbag body. | 01-05-2012 |
20120031896 | HEATING APPARATUS - An apparatus for efficient heating liquids or gases comprising of a transformer having a primary and secondary winding wherein the secondary winding forms a shorted heating element permitting liquid or gas to pass therethrough, wherein the liquid or gas is heated and heat transfer may be optionally facilitated through use of disc filters disposed within said heating element promoting turbulent flow which aids in mixing and more efficient thermal transfer. In an alternative embodiment, the heating element is not the secondary winding but another portion of the circuit on the alienation side of the transformer. The heating element may be comprised of a variety of sizes, shapes, and materials. In an alternative embodiment, the alienation side of the transformer may have a reverse winding which cancels reactive currents generated in the secondary winding. | 02-09-2012 |
Patent application number | Description | Published |
20100081073 | Titanyl phthalocyanin crystal, method for preparing the same and electrophotographic photoconductor - According to the present invention, a titanyl phthalocyanin crystal excellent in storage stability in organic solvents, a method for preparing the same and an electrophotographic photoconductor using the same are provided. In the titanyl phthalocyanin crystal, the method for preparing such a titanyl phthalocyanin crystal and the electrophotographic photoconductor using the same, the titanyl phthalocyanin crystal is characterized by having the maximum peak at a Bragg angle 2 θ±0.2°=27.2° in a CuKα characteristic X-ray diffraction spectrum and one peak within the range of 270 to 400° C. other than a peak accompanied by the vaporization of adsorbed water in a differential scanning calorimetric analysis. | 04-01-2010 |
20100189482 | DRUM UNIT AND IMAGE-FORMING APPARATUS INCLUDING THE SAME - In some embodiments, a drum unit may include an electrophotographic photosensitive member having a base member and a photosensitive layer on the base member. An embodiment may include a cleaning blade configured to abut the photosensitive layer to remove a developer remaining on the photosensitive layer of the electrophotographic photosensitive member. Some embodiments may include side seals disposed at both ends of the cleaning blade to inhibit leakage of the developer. In some embodiments, a portion of a side seal may be in contact with at least a portion of the surface and an end face of the photosensitive layer. | 07-29-2010 |
20110046392 | Oxo-titanylphthalocyanine crystal, method for producing the same, and electrophotographic photoreceptor - The invention provides an oxo-titanylphthalocyanine crystal which is stable, is superior in dispersibility in a photoreceptive layer and efficiently contributes to improvements in sensitivity and charge retention rate of an electrophotographic photoreceptor when it is used as a charge generating agent, a method for producing the oxo-titanylphthalocyanine crystal, and an electrophotographic photoreceptor. The oxo-titanylphthalocyanine crystal has predetermined optical characteristics and thermal properties and is produced by a production method including the following steps (a) to (d): (a) a step of dissolving a crude oxo-titanylphthalocyanine crystal in an acid to obtain an oxo-titanylphthalocyanine solution; (b) a step of adding the oxo-titanylphthalocyanine solution dropwise in a poor solvent to obtain a wet cake; (c) a step of washing the wet cake with an alcohol having 1 to 4 carbon atoms; and (d) a step of stirring the washed wet cake under heating in a nonaqueous solvent to obtain an oxo-titanylphthalocyanine crystal. | 02-24-2011 |
20120296082 | Oxo-Titanylphthalocyanine Crystal, Method for Producing the Same and Electrophotographic Photoreceptor - The invention provides an oxo-titanylphthalocyanine crystal which is stable, is superior in dispersibility in a photoreceptive layer and efficiently contributes to improvements in sensitivity and charge retention rate of an electophotographic photoreceptor when it is used as a charge generating agent, a method for producing the oxo-titanylphthalocyanine crystal, and an electrophotographic photoreceptor the oxo-titanylphthalocyanine crystal has predetermined optical characteristics and thermal properties and is produced by a production method including the following steps (a) to (d): (a) a step of dissolving a crude oxo-titanylphthalocyanine crystal in an acid to obtain an oxo-titanylphthalocyanine solution; (b) a step of adding the oxo-titanylphthalocyanine solution dropwise in a poor solvent to obtain a wet cake; (c) a step of washing the wet cake with an alcohol having 1 to 4 carbon atoms; and (d) a step of stirring the washed wet cake under heating in a nonaqueous solvent to obtain an oxo-titanylphthalocyanine crystal. | 11-22-2012 |
20140212802 | MULTI-LAYERED ELECTROPHOTOGRAPHIC PHOTOSENSITE MEMBER, IMAGE FORMING APPARATUS, AND METHOD FOR PRODUCING MULTI-LAYERED ELECTROPHOTOGRAPHIC PHOTOSENSITIVE MEMBER - A multi-layered electrophotographic photosensitive member includes a multi-layered photosensitive layer. In the multi-layered photosensitive layer, a charge generating layer that contains a charge generating material and a charge transport layer that contains a charge transport material and a binder resin are layered sequentially. The binder resin includes a polycarbonate resin represented by a formula (1). | 07-31-2014 |
20140356773 | ELECTROPHOTOGRAPHIC PHOTOSENSITIVE MEMBER AND IMAGE FORMING APPARATUS - An electrophotographic photosensitive member includes a photosensitive layer. The photosensitive layer contains a charge generating material, a hole transport material, and a binder resin. The hole transport material contains an amine stilbene derivative represented by a general formula (1), and the binder resin contains a polycarbonate resin represented by a general formula (2). | 12-04-2014 |
20150093696 | ELECTROPHOTOGRAPHIC PHOTOSENSITIVE MEMBER - An electrophotographic photosensitive member includes a photosensitive layer that contains a charge generating material, a hole transport material, a binder resin, and a plasticizer. The hole transport material contains a triarylamine derivative represented by General Formula (1) below. The plasticizer contains at least one of a compound represented by General Formula (2a) and a compound represented by General Formula (2b) below. | 04-02-2015 |
20150118608 | MULTI-LAYER ELECTROPHOTOGRAPHIC PHOTOSENSITIVE MEMBER - A multi-layer electrophotographic photosensitive member contains a charge generating material including oxo-titanium phthalocyanine that among diffraction peaks for Bragg angles 2θ±0.2° with respect to characteristic X-rays of CuKα having a wavelength of 1.542 Å, at least exhibits a highest diffraction peak at 27.2°. The multi-layer electrophotographic photosensitive member also contains a hole transport material including a triarylamine derivative shown in Generic Formula (1). A ratio of the hole transport material relative to a binder resin in a charge transport layer is no greater than 0.55. In Generic Formula (1), Ar | 04-30-2015 |
20150253682 | ELECTROPHOTOGRAPHIC PHOTOSENSITIVE MEMBER - An electrophotographic photosensitive member has a photosensitive layer. The photosensitive layer is a multi-layer photosensitive layer having a charge transport layer being an outermost layer or a single-layer photosensitive layer. The amount of silica particles contained in the photosensitive layer is at least 0.5 parts by mass and no greater than 15 parts by mass relative to 100 parts by mass of a binder resin contained in the photosensitive layer. | 09-10-2015 |
20150261106 | ELECTROPHOTOGRAPHIC PHOTOSENSITIVE MEMBER - An electrophotographic photosensitive member includes a photosensitive layer. The photosensitive layer is a single-layer photosensitive layer or a multi-layer photosensitive layer having a charge transport layer as an outermost layer. Silica particles are contained in the photosensitive layer in an amount of no less than 0.5 parts by mass and no greater than 15 parts by mass relative to 100 parts by mass of a binder resin. The binder resin includes a polycarbonate resin represented by the general formula (1a) or the general formula (1b). | 09-17-2015 |
Patent application number | Description | Published |
20100046273 | RESISTANCE CHANGE NONVOLATILE MEMORY DEVICE - Memory cells (MC) are formed at intersections of bit lines (BL) extending in the X direction and word lines (WL) extending in the Y direction. A plurality of basic array planes sharing the word lines (WL), each formed for a group of bit lines (BL) aligned in the Z direction, are arranged side by side in the Y direction. In each basic array plane, bit lines in even layers and bit lines in odd layers are individually connected in common. Each of selection switch elements ( | 02-25-2010 |
20100172171 | RESISTANCE VARIABLE MEMORY APPARATUS - A resistance variable memory apparatus ( | 07-08-2010 |
20100258779 | NONVOLATILE MEMORY DEVICE AND MANUFACTURING MEHTOD THEREOF - A nonvolatile memory device of the present invention includes a substrate ( | 10-14-2010 |
20100264393 | NONVOLATILE MEMORY DEVICE AND MANUFACTURING METHOD THEREOF - A nonvolatile memory device of the present invention comprises a substrate ( | 10-21-2010 |
20100321982 | NONVOLATILE STORAGE DEVICE AND METHOD FOR WRITING INTO THE SAME - To provide a nonvolatile storage device ( | 12-23-2010 |
20110075469 | RESISTANCE VARIABLE NONVOLATILE MEMORY DEVICE - Each of memory cells (MC) includes one transistor and one resistance variable element. The transistor includes a first main terminal, a second main terminal and a control terminal. The resistance variable element includes a first electrode, a second electrode and a resistance variable layer provided between the first electrode and the second electrode. A first main terminal of one of two adjacent memory cells is connected to a second main terminal of the other memory cell, to form a series path (SP) sequentially connecting main terminals of the plurality of memory cells in series. Each of the memory cells is configured such that the control terminal is a part of a first wire (WL) associated with the memory cell or is connected to the first wire associated with the memory cell, the second electrode is a part of a second wire (SL) associated with the memory cell or is connected to the second wire associated with the memory cell; and the first electrode is a part of a series path (SP) associated with the memory cell or is connected to the series path associated with the memory cell. | 03-31-2011 |
20110110144 | WRITING METHOD FOR VARIABLE RESISTANCE NONVOLATILE MEMORY ELEMENT, AND VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE - A writing method optimum for a variable resistance element which can maximize an operation window of the variable resistance element is provided. The writing method is performed for a variable resistance element that reversibly changes between a high resistance state and a low resistance state depending on a polarity of an applied voltage pulse. The writing method includes a preparation step (S | 05-12-2011 |
20110122680 | VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE - A nonvolatile resistance variable memory device ( | 05-26-2011 |
20110128773 | NONVOLATILE VARIABLE RESISTANCE MEMORY ELEMENT WRITING METHOD, AND NONVOLATILE VARIABLE RESISTANCE MEMORY DEVICE - To provide a variable resistance element writing method that, even when a variable resistance element has a possibility of becoming a half LR state, can ensure a maximum resistance change window by correcting the variable resistance element to a normal low resistance state. In a method of writing data to a variable resistance element ( | 06-02-2011 |
20110249486 | RESISTANCE VARIABLE MEMORY APPARATUS - A resistance variable memory apparatus ( | 10-13-2011 |
20120099367 | CROSS POINT VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE - A cross point variable resistance nonvolatile memory device includes memory cells having the same orientation for stable characteristics of all layers. Each memory cell ( | 04-26-2012 |
20120120712 | FORMING METHOD FOR VARIABLE RESISTANCE NONVOLATILE MEMORY ELEMENT, AND VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE - An optimum forming method of performing a forming for a variable resistance element to maximize an operation window of the variable resistance element is provided. The forming method is used to initialize a variable resistance element ( | 05-17-2012 |
20120176834 | VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE - Each of basic array planes has a first via group that interconnects only even-layer bit lines in the basic array plane, and a second via group that interconnects only odd-layer bit lines in the basic array plane, the first via group in a first basic array plane and the second via group in a second basic array plane adjacent to the first basic array in a Y direction are adjacent to each other in the Y direction, and the second via group in the first basic array plane and the first via group in the second basic array plane are adjacent to each other in the Y direction, and the second via group in the second basic array plane is disconnected from a second global line when connecting the first via group in the first basic array plane to a first global line. | 07-12-2012 |
20120236628 | VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE - In a nonvolatile memory device, basic array planes ( | 09-20-2012 |
20130003439 | NONVOLATILE VARIABLE RESISTANCE MEMORY ELEMENT WRITING METHOD, AND NONVOLATILE VARIABLE RESISTANCE MEMORY DEVICE - A method of writing data to a variable resistance element ( | 01-03-2013 |
20130021838 | METHOD OF INSPECTING VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE AND VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE - A method of inspecting a variable resistance nonvolatile memory device detecting a faulty memory cell of a memory cell array employing a current steering element, and a variable resistance nonvolatile memory device are provided. The method of inspecting a variable resistance nonvolatile memory device having a memory cell array, a memory cell selection circuit, and a read circuit includes: determining that a current steering element has a short-circuit fault when a variable resistance element is in a low resistance state and a current higher than or equal to a predetermined current passes through the current steering element, when the resistance state of the memory cell is read using a second voltage; and determining whether the variable resistance element is in the low or high resistance state, when the resistance state of the memory cell is read using a first voltage. | 01-24-2013 |
20130077384 | CROSS POINT VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE AND METHOD OF READING THEREBY - A cross point variable resistance nonvolatile memory device including: a cross point memory cell array having memory cells each of which is placed at a different one of cross points of bit lines and word lines; a word line decoder circuit that selects at least one of the memory cells from the memory cell array; a read circuit that reads data from the selected memory cell; an unselected word line current source that supplies a first constant current; and a control circuit that controls the reading of the data from the selected memory cell, wherein the control circuit controls the word line decoder circuit, the read circuit, and the unselected word line current source so that when the read circuit reads data, the first constant current is supplied to an unselected word line. | 03-28-2013 |
20130114327 | VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE - A variable resistance nonvolatile memory device including memory cells provided at cross-points of first signal lines and second signal lines, each memory cell including a variable resistance element and a current steering element connected to the variable resistance element in series, the variable resistance nonvolatile memory device including a write circuit, a row selection circuit, and a column selection circuit, wherein the write circuit: sequentially selects blocks in an order starting from a block farthest from at least one of the row selection circuit and the column selection circuit and finishing with a block closest to the at least one of the row selection circuit and the column selection circuit; and performs, for each of the selected blocks, initial breakdown on each memory cell included in the selected block. | 05-09-2013 |
20130148406 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND READ METHOD FOR THE SAME - A cross point nonvolatile memory device capable of suppressing sneak-current-caused reduction in sensitivity of detection of a resistance value of a memory element is provided. The device includes perpendicular bit and word lines; a cross-point cell array including memory cells each having a resistance value reversibly changing between at least two resistance states according to electrical signals, arranged on cross-points of the word and bit lines; an offset detection cell array including an offset detection cell having a resistance higher than that of the memory cell in a high resistance state, the word lines being shared by the offset detection cell array; a read circuit (a sense amplifier) that determines a resistance state of a selected memory cell based on a current through the selected bit line; and a current source which supplies current to the offset detection cell array in a read operation period. | 06-13-2013 |
20130223133 | CROSS POINT VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE AND METHOD OF WRITING THEREBY - A cross point variable nonvolatile memory device includes a memory cell array including: first memory cells (e.g., part of a memory cell array) having a common word line; and second memory cells (e.g., another part of the memory cell array or a compensation cell unit). When a predetermined memory cell among the first memory cells is written to by changing the predetermined memory cell to a first resistance state, a word line write circuit supplies a first voltage or a first current to a selected word line, a first bit line write circuit supplies a third voltage or a third current to one bit line of the first memory cells, and a second bit line write circuit supplies the third voltage or the third current to A bit line or lines of the second memory cells. | 08-29-2013 |
20140056055 | VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE, AND ACCESSING METHOD FOR VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE - A variable resistance nonvolatile memory device includes: bit lines in layers; word lines in layers formed at intervals between the layers of the bit lines; a memory cell array including basic array planes and having memory cells formed at crosspoints of the bit lines in the layers and the word lines in the layers; global bit lines provided in one-to-one correspondence with the basic array planes; and sets provided in one-to-one correspondence with the basic array planes, and each including a first selection switch element and a second selection switch element, wherein memory cells connected to the same word line are successively accessed in different basic array planes, and memory cells are selected so that voltages applied to the word line and bit lines are not changed and a direction in which current flows through the memory cells is the same. | 02-27-2014 |
20140078814 | CROSSPOINT NONVOLATILE MEMORY DEVICE AND METHOD OF DRIVING THE SAME - The nonvolatile memory device includes a control circuit that controls a sense amplification circuit and a writing circuit. The control circuit changes a value of at least one of (a) a load current and (b) a forming pulse current or a forming pulse voltage, according to a total number of sneak current paths formed by memory cells each including a variable resistance element in a second resistance state having a low resistance value except a selected memory cell in a memory cell array. | 03-20-2014 |
20140092671 | CROSS-POINT VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE - A cross-point memory device including memory cells each includes: a variable resistance element that reversibly changes at least between a low resistance state and a high resistance state; and a current steering element that has nonlinear current-voltage characteristics, and the cross-point memory device comprises a read circuit which includes: a reference voltage generation circuit which comprises at least the current steering element; a differential amplifier circuit which performs current amplification on an output voltage in the reference voltage generation circuit; a feedback controlled bit line voltage clamp circuit which sets the low voltage side reference voltage to increase with an output of the differential amplifier circuit; and a sense amplifier circuit which determines a resistance state of a selected memory cell according to an amount of current flowing through the selected memory cell. | 04-03-2014 |
20140098594 | CROSS POINT VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE - Each memory cell is formed at a different one of cross points of bit lines extending in an X direction and formed in a plurality of layers and word lines extending in a Y direction. In a multilayer cross point structure in which a plurality of vertical array planes sharing the word lines are aligned in the Y direction each for a group of bit lines aligned in a Z direction, even and odd layer bit line selection switch elements switch connection and disconnection between a global bit line and the commonly-connected even layer bit line and the commonly-connected odd layer bit line, respectively. Each of the even and odd layer bit line selection switch elements has both a bit line selection function and a current limiting function in low resistance writing. | 04-10-2014 |
20140104925 | CROSS-POINT VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE AND READING METHOD FOR CROSS-POINT VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE - A cross-point variable resistance nonvolatile memory device comprises: a memory cell array; a column decoder and pre-charge circuit which pre-charges a selected word line to a first voltage in a period P | 04-17-2014 |
20140104931 | NONVOLATILE MEMORY DEVICE AND METHOD OF PERFORMING FORMING THE SAME - A nonvolatile memory device including a control unit configured to read resistance value information for each of memory cells as initial resistance value information and store it temporarily before a voltage pulse for forming is applied, to set resistance value information as a threshold value serving as a target for completion of the forming, the resistance value information being obtained by multiplying the initial resistance value information by a predetermined coefficient, and to repeat application of the voltage pulse for forming and reading of the resistance value information until a resistance value indicated by the resistance value information on the memory cell becomes lower than a resistance value indicated by the threshold value. | 04-17-2014 |
20140112054 | CROSSPOINT NONVOLATILE MEMORY DEVICE AND FORMING METHOD THEREOF - A sense amplification circuit includes a sneak current compensating load current supply unit that selectively switches a load current among load currents having different current amounts and supplies the load current to a bit line selected by a column selection circuit. The sense amplification circuit outputs ‘L’ level when a current amount of the load current is more than a reference current amount, and outputs ‘H’ level when the current amount is less than the reference current amount. A control circuit adjusts the current amount to a predetermined current amount that causes the sense amplification circuit to output ‘H’ level. After the adjustment, the control circuit performs control to supply the load current having the predetermined current amount and controls the writing unit to keep the application until the sense amplification circuit outputs ‘L’ level. | 04-24-2014 |
20140112055 | VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE AND METHOD OF WRITING THEREBY - Provided is a variable resistance nonvolatile memory device that achieves, in multi-bit simultaneous writing for increasing a writing speed, writing with little variation caused by positions of memory cells in multi-bit simultaneous writing. The variable resistance nonvolatile memory device includes bit lines, word lines, memory cells, a first write circuit (e.g., a write circuit ( | 04-24-2014 |
20150179251 | RESISTANCE-CHANGE NONVOLATILE MEMORY DEVICE - A selection circuit that selects a memory cell from a memory cell array and a read circuit for reading a resistance state of a resistance change element in the selected memory cell are provided. In memory cells of odd-numbered-layer and even-numbered-layer memory cell arrays that constitute a multilayer memory cell array, each memory cell in any of the layers has a selection element, a first electrode, a first resistance change layer, a second resistance change layer, and a second electrode that are disposed in the same order. Whether the selected memory cell is located in any layer of the multilayer memory cell array, the read circuit applies a voltage to the selected memory cell to perform the reading operation. The voltage applied to the selected memory cell causes the second electrode to become positive with reference to the first electrode in the selected memory cell. | 06-25-2015 |
20150364193 | VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE - A variable resistance nonvolatile memory device includes: a nonvolatile memory element; an NMOS transistor connected to the nonvolatile memory element; a source line connected to the NMOS transistor; a bit line connected to the nonvolatile memory element. When a control circuit causes the nonvolatile memory element to be in the low resistance state, the control circuit controls to flow a first current from a first voltage source to a reference potential point, and applies a first gate voltage to a gate of a NMOS transistor, and when the control circuit causes the nonvolatile memory element to be in the high resistance state, the control circuit controls to flow a second current from a second voltage source to the reference potential point, and applies a second gate voltage to the gate of the NMOS transistor, the second gate voltage being lower than the first gate voltage. | 12-17-2015 |