| Patent application number | Description | Published |
| 20090239300 | SEPARATING MATERIAL AND METHOD FOR COLLECTING CELL OR THE LIKE USING THE SAME - The present invention provides a novel material useful for selectively isolating a cell such as monocyte and the like or a protein from a body fluid and a production method thereof, a physiological material using the material and an isolation material using the physiological material, as well as a method of harvesting a cell such as monocyte and the like using the isolation material, a method of harvesting a protein and a method of preparing a dendritic cell. | 09-24-2009 |
| 20090312452 | POLYURETHANE DERIVATIVE, POLYURETHANE FOAM, AND PROCESS FOR PRODUCING THEM - This invention provides a novel optionally acylated cyclic tetrasaccharide-containing polyurethane derivative and a process for producing the same, and a novel cyclic tetrasaccharide modified polyurethane foam and a simple process for producing the same. Specifically, the present invention provides a polyurethane derivative containing an optionally acylated cyclic tetrasaccharide: cyclo{→6)-α-D-glucopyranosyl-(1→3)-α-D-glucopyranosyl-(1→-6)-α-D-glucopyranosyl-(1→3)-α-D-glucopyranosyl-(1→}, a process for producing polyurethane, comprising reacting an acylated cyclic tetrasaccharide and a diol compound with a diisocyanete compound, a process for producing a cyclic tetrasaccharide-containing polyurethane, comprising hydrolyzing the polyurethane, a process for producing a polyurethane foam, comprising reacting polyol with polyisocyanete in the presence of the cyclic tetrasaccharide and foaming the reaction product, and a cyclic tetrasaccharide modified polyurethane foam produced by the production process. | 12-17-2009 |
| Patent application number | Description | Published |
| 20090128181 | DRIVER CIRCUIT AND TEST APPARATUS - Provided is a driver circuit that includes a first operational mode and a second operational mode and outputs an output signal according to an input signal, including a first driver section that, in the first operational mode, generates and outputs the output signal according to the input signal and, in the second operational mode, outputs a power supply power having a predetermined voltage and a second driver section that, in the first operational mode, receives the output signal output by the first driver section and outputs the received signal to the outside and, in the second operational mode, generates the output signal according to the input signal and outputs the thus generated signal to the outside. The second driver section includes a first transistor that, in the second operational mode, generates the output signal by operating according to the input signal and receives the power supply power from the first driver section and a second transistor that, in the second operational mode, operates differentially with respect to the first transistor and receives the power supply power from the first driver section commonly with the first transistor. | 05-21-2009 |
| 20090128182 | DRIVER CIRCUIT AND TEST APPARATUS - Provided is a driver circuit that has a first operational mode and a second operational mode and outputs an output signal according to an input signal. The driver circuit includes a first driver section that, in the first operational mode, generates and outputs the output signal according to the input signal and, in the second operational mode, is controlled to be disabled; a high precision driver section that, in the first operational mode, is controlled to be disabled and, in the second operational mode, outputs a source power having a predetermined voltage; and a second driver section that, in the first operational mode, receives the output signal output by the first driver section and outputs the received signal to the outside and, in the second operational mode, receives the source power from the high precision driver section, generates the output signal according to the input signal, and outputs the thus generated signal to the outside. | 05-21-2009 |
| 20090134900 | Test apparatus, pin electronics card, electrical device and switch - Provided is a test apparatus for testing a device under test, the test apparatus including: a pattern generating section that inputs a test pattern to the device under test; a judging section that receives an output signal of the device under test, and makes judgment concerning pass/fail of the device under test based on the output signal; an internal circuit that exchanges signals between the device under test and the pattern generating section or the judging section; a first transmission line that connects the internal circuit to the device under test; and a first switch that connects the first transmission line to a ground potential in not testing the device under test, and cuts off the first transmission line from the ground potential in testing of the device under test. | 05-28-2009 |
| 20090158103 | TEST APPARATUS AND TEST METHOD - The apparatus includes a first variable delay circuit that delays a data signal from a device under test (DUT) to output a delay data signal; a second variable delay circuit that delays a clock signal to output a first delay clock signal; a first FF that acquires the delay data signal based on a reference clock; a second FF that acquires the first delay clock signal based on the clock; a first delay adjusting section that adjusts a delay amount of at least one of the first and second variable delay circuits so that the first and second FFs acquire the delay data signal and the first delay clock signal when the signals are changed; a third variable delay circuit that delays the clock signal to output a second delay clock signal; a second delay adjusting section that adjusts a delay amount of the third variable delay circuit based on the acquired first delay clock signal of which a phase is adjusted by the first delay adjusting section when the second delay clock is changed, in order to adjust a phase difference between the first and second delay clock signals to a desired phase difference; a deciding section that decides the quality of the data signal from the DUT based on a result obtained by acquiring the delay data signal when the second delay clock signal is changed. | 06-18-2009 |
| 20090209210 | DRIVER CIRCUIT AND TEST APPARATUS - Provided is a driver circuit that outputs a transmission signal according to a reception signal received from outside, including a first driver that outputs a voltage according to an input first signal; a second driver that receives the voltage output by the first driver as a power supply voltage and outputs the transmission signal according to the power supply voltage and an input second signal; and a control section that delays both the first signal and the second signal, according to a change of the reception signal, and causes the transmission signal according to the reception signal to be output from the second driver. | 08-20-2009 |
| 20100001776 | DIFFERENTIAL SIGNAL TRANSMITTING APPARATUS AND A TEST APPARATUS - Provided is a differential signal transmission apparatus that transmits a differential signal expressed by a potential difference between a positive signal and a negative signal, including a positive signal transmission line that transmits the positive signal; a negative signal transmission line that transmits the negative signal; and a delay compensating circuit that compensates for a time difference between the positive signal and the negative signal with a variable compensation time. | 01-07-2010 |