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Atushi
Atushi Fujisawa, Hakodate JP
| Patent application number | Description | Published |
|---|---|---|
| 20080211069 | SEMICONDUCTOR PACKAGE CONFIGURATION WITH IMPROVED LEAD PORTION ARRANGEMENT - A semiconductor device with improved reliability is provided. The semiconductor device in a QFN package configuration has a semiconductor chip mounted on a tab, leads which are alternately arranged around the tab and electrically connected to the electrodes of the semiconductor chip via bonding wires, and an encapsulating resin portion for encapsulating therein the semiconductor chip and the bonding wires. The lower exposed surfaces of the leads are exposed at the outer peripheral portion of the back surface of the encapsulating resin portion to form external terminals. The lower exposed surfaces of the leads are exposed at the portion of the back surface of the encapsulating resin portion which is located inwardly of the lower exposed surface of the leads to also form external terminals. The cut surfaces of the leads are exposed at the cut surfaces of the encapsulating resin portion, while the upper exposed surfaces of the leads are exposed from the portion of the encapsulating resin portion which is proximate to the cut surfaces thereof. Each of the upper exposed surfaces of the leads has a width smaller than the width of each of the lower exposed surfaces thereof. | 09-04-2008 |
Atushi Ishikawa, Odawara JP
| Patent application number | Description | Published |
|---|---|---|
| 20080244183 | Storage system - An object of the present invention is to provide a storage system which is shared by a plurality of application programs, wherein optimum performance tuning for a cache memory can be performed for each of the individual application programs. The storage system of the present invention comprises a storage device which provides a plurality of logical volumes which can be accessed from a plurality of application programs, a controller for controlling input and output of data to and from the logical volumes in response to input/output requests from the plurality of application programs, and a cache memory for temporarily storing data input to and output from the logical volume, wherein the cache memory is logically divided into a plurality of partitions which are exclusively assigned to the plurality of logical volumes respectively. | 10-02-2008 |
Atushi Nakanouchi, Fukushima JP
| Patent application number | Description | Published |
|---|---|---|
| 20110080140 | BATTERY PACK - A battery pack includes a current control device that has a thermostat and a positive temperature coefficient device whose resistance increases as the temperature rises connected in parallel, the current control device being inserted into a discharge current path of a battery cell and a protection circuit that detects a voltage of the battery cell, detects an overcharge and over-discharge of the battery cell, and generates an overcharge detection signal and an over-discharge detection signal. In a normal state, a discharge current of the battery cell flows through the thermostat of the current control device. When the discharge current is large enough to damage the battery cell, the thermostat turns off and the discharge current flows through the positive temperature coefficient device. When the positive temperature coefficient device produces heat, a resistance of the positive temperature coefficient device increases and the discharge current is limited or interrupted. | 04-07-2011 |
Atushi Ogawa, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20110297715 | CUP HOLDER - A cup holder holding an object includes: a storing part being cylindrical and being opened at an upper portion; an opening part provided at a side wall of the storing part; a holder being biased towards an interior of the storing part and being stored inside the opening part so that the holder may protrude and retract; and a restricting part provided on the opening part, wherein the restricting part restrains a movement of the holder at a maximum storage position. | 12-08-2011 |
Atushi Suzuki, Kanagawa JP
| Patent application number | Description | Published |
|---|---|---|
| 20080224913 | DATA PROCESSING METHOD, DATA PROCESSING DEVICE, SOLID-STATE IMAGING DEVICE, IMAGING APPARATUS, AND ELECTRONIC DEVICE - A data processing device includes a comparing unit that compares a reference signal and respective processing object signals, a count-period control unit that determines a count period to perform count processing, a count unit that performs the count processing in the count period designated by the count-period control unit, stores a count value, applies the count processing to both a subtraction element and an addition element in an identical mode of any one of an up-count mode and a down-count mode, and starts the count processing for a following processing object signal using a count value for a preceding processing object signal as an initial value, and a correcting unit that corrects digital data of a multiply-accumulate result of the plural processing object signals to digital data in which a count value is corrected. | 09-18-2008 |
Atushi Watanabe, Suntou-Gun JP
| Patent application number | Description | Published |
|---|---|---|
| 20120036825 | ENGINE - A combuster ( | 02-16-2012 |