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Arviv, IL
Benny Arviv, Tzur Moshe IL
| Patent application number | Description | Published |
|---|---|---|
| 20110230181 | Avoiding Transmitter Collision Sessions in Femtocells Arrays - Control unit within a femtocell base station is arranged to detect a transmission collision situation and resolves it by adjusting the timing of the transmission signal and consequently the frame position gradually over time. The adjustment (or shift) is performed in a slow enough rate such that the User Equipments currently connected (camped) to the femtocell base station remain connected. Additionally, a method is also provided. The method comprises: detecting neighboring base stations; detecting frame boundaries of the transmitting signal of each detected neighboring base station; calculating optimal transmit position; setting transmit position to calculated optimal transmit position; and maintaining optimal transmit position by gradually adjusting transmit position over time. In case, detecting neighboring base stations is not possible, the method comprises: detecting absolute time drifting in view of an absolute accurate time reference and maintaining constant absolute transmit position by gradually adjusting transmit position over time. | 09-22-2011 |
Binyamin Arviv, Tzur Moshe IL
| Patent application number | Description | Published |
|---|---|---|
| 20090147899 | CLOCK CALIBRATION IN SLEEP MODE - In one embodiment, an improvement is described for synchronization between devices in, e.g., a wireless network, wherein at least one device includes both a slow clock and a fast clock for different modes of operation. The fast clock for an active mode of operation is calibrated after a sleep mode of operation during which the slow clock is employed for device timing. Calibration employs a filter-based technique. Counts for the slow clock and for the fast clock are measured over a first interval, and the number of slow-clock counts is measured over a second interval. An estimate for the number of fast counts over the second interval is generated, filtered to reduce noise and error effects, and then employed to update the fast clock in the active mode of operation. | 06-11-2009 |
Eli Arviv, Modi'In IL
| Patent application number | Description | Published |
|---|---|---|
| 20090161623 | FRAME STRUCTURE FOR AN ADAPTIVE MODULATION WIRELESS COMMUNICATION SYSTEM - A method of simplifying the encoding of a predetermined number of bits of data into frames including adding error coding bits so that a ratio of the frame length times the baud rate of the frame times he bit packing ratio of the data divided the total bits of data is always an integer. The method may also convolutionally encode the bits of data so that the same equation is also always an integer. | 06-25-2009 |
| 20100323733 | FRAME STRUCTURE FOR AN ADAPTIVE MODULATION WIRELESS COMMUNICATION SYSTEM - A method of simplifying the encoding of a predetermined number of bits of data into frames including adding error coding bits so that a ratio of the frame length times the baud rate of the frame times the bit packing ratio of the data divided the total bits of data is always an integer. The method may also convolutionally encode the bits of data so that the same equation is also always an integer. | 12-23-2010 |
Eli Arviv, Modiein IL
| Patent application number | Description | Published |
|---|---|---|
| 20090279652 | Synchronizing Clocks Across a Communication Link - Apparatus, system and method for synchronizing one or more clocks across a communication link. A slave clock may be synchronized to a master clock by means of a synchronization signal sent from the master to the slave clock side of the link. The synchronization signal may be an expected signal pattern sent at intervals expected by the slave side. The slave clock may correlate received signals with a representation of the expected synchronization signal to produce a correlation sample sequence at a first sample rate which is related as n times the slave clock rate. The synchronization signal receipt time indicated by the correlation sample sequence may be refined by interpolating the correlation sample sequence around a best correlation sample to locate a best interpolation at an interpolation resolution smaller than the sample resolution. The best interpolation may in turn be further refined by estimating between interpolator outputs adjacent to the best interpolation output. The synchronization signal receipt time thus determined is compared to the expected time based upon the slave clock, which is adjusted until the times match. After initialization, all slave clock errors are preferably accumulated to prevent long-term slip between the slave and master clocks. Formerly independent master and slave clocks synchronized across the communication link constitute a noncommon clock which may be compared on each side of the link to secondary independent clocks, and the secondary independent clocks may then be separately synchronized by adjusting one to have the same difference from its local noncommon clock as the secondary clock on the other side of the link has from its local noncommon clock. | 11-12-2009 |
| 20110122981 | SYNCHRONIZING CLOCKS ACROSS A COMMUNICATION LINK - Apparatus, system and method for synchronizing one or more clocks across a communication link. A slave clock may be synchronized to a master clock by means of a synchronization signal sent from the master to the slave clock side of the link. The synchronization signal may be an expected signal pattern sent at intervals expected by the slave side. The slave clock may correlate received signals with a representation of the expected synchronization signal to produce a correlation sample sequence at a first sample rate which is related as n times the slave clock rate. The synchronization signal receipt time indicated by the correlation sample sequence may be refined by interpolating the correlation sample sequence around a best correlation sample to locate a best interpolation at an interpolation resolution smaller than the sample resolution. The best interpolation may in turn be further refined by estimating between interpolator outputs adjacent to the best interpolation output. The synchronization signal receipt time thus determined is compared to the expected time based upon the slave clock, which is adjusted until the times match. After initialization, all slave clock errors are preferably accumulated to prevent long-term slip between the slave and master clocks. Formerly independent master and slave clocks synchronized across the communication link constitute a noncommon clock which may be compared on each side of the link to secondary independent clocks, and the secondary independent clocks may then be separately synchronized by adjusting one to have the same difference from its local noncommon clock as the secondary clock on the other side of the link has from its local noncommon clock. | 05-26-2011 |
Eliahou Arviv, Modiin IL
| Patent application number | Description | Published |
|---|---|---|
| 20100027592 | TECHNIQUE FOR SEARCHING FOR A PREAMBLE SIGNAL IN A SPREAD SPECTRUM SIGNAL USING A FAST HADAMARD TRANSFORM - In one embodiment, a method for demodulating and searching for a preamble signal containing a complex phasor signal is disclosed. The complex phasor is demodulated using a phasor-rotated fast transformer. A received signal is correlated with a spreading code to produce a correlated signal. The correlated signal is coherently accumulated to produce a coherently accumulated signal. A first phasor-rotated signal transformation is performed on a real component of the coherently accumulated signal, and a second phasor-rotated signal transformation is performed on an imaginary component of the coherently accumulated signal. Finally, the signal power of the transformed real and imaginary components of the coherently accumulated signal is determined. | 02-04-2010 |
| 20110058619 | SIGNAL PROCESSING USING MODIFIED BLOCKWISE ANALYTIC MATRIX INVERSION - In one embodiment, a method for signal processing is provided that uses an improved inversion to mitigate the imprecision introduced by fast approximate methods for division. An input signal is received and processed to generate a matrix M. The matrix M is inverted to generate an inverted matrix M | 03-10-2011 |
Eliahou Arviv, Modin IL
| Patent application number | Description | Published |
|---|---|---|
| 20080243982 | Hardware matrix computation for wireless receivers - In one embodiment, a receiver including one or more signal-processing blocks and a hardware-based matrix co-processor. The one or more signal-processing blocks are adapted to generate a processed signal from a received signal. The hardware-based matrix co-processor includes two or more different matrix-computation engines, each adapted to perform a different matrix computation, and one or more shared hardware-computation units, each adapted to perform a mathematical operation. At least one signal-processing block is adapted to offload matrix-based signal processing to the hardware-based matrix co-processor. Each of the two or more different matrix-computation engines is adapted to offload the same type of mathematical processing to at least one of the one or more shared hardware-computation units. | 10-02-2008 |
| 20080298334 | REDUCING FALSE DETECTION IN AN HSDPA 3G TERMINAL - In one embodiment, a method for determining whether an encoded message in a shared channel is not intended for a communications device. The method includes: (a) decoding the message to recover a multi-bit codeword; (b) determining whether the codeword is valid or invalid, wherein, if the codeword is determined to be invalid, then the encoded message is not intended for the communications device; and (c) if the codeword is determined to be valid, then performing one or more other steps of the method to determine whether the encoded message in the shared channel is not intended for the communications device. | 12-04-2008 |