| Patent application number | Description | Published |
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| 20090037682 | HYPERVISOR-ENFORCED ISOLATION OF ENTITIES WITHIN A SINGLE LOGICAL PARTITION'S VIRTUAL ADDRESS SPACE - Access control to shared virtual address space within a single logical partition is provided. The access control includes: associating, by a hypervisor of the data processing system, a memory protection key with a portion of a single logical partition's virtual address space being shared by multiple entities, the key preventing access by one of the multiple entities to that portion of the virtual address space, and allowing access by another of the entities to that portion of the virtual address space; and locking by the hypervisor the memory protection key from modification by the one entity, wherein the locking prevents the one entity from modifying the key and thereby gaining access to the portion of the single logical partition's virtual address space with the associated memory protection key. In one embodiment, the one entity is the single logical partition itself, and the another entity is a partition adjunct. | 02-05-2009 |
| 20090037906 | PARTITION ADJUNCT FOR DATA PROCESSING SYSTEM - A partition adjunct is provided for a logical partition running above a hypervisor of a data processing system. The partition adjunct, which is a separate dispatchable partition from an instantiating logical partition, provides one or more services to the logical partition. A service request received from the logical partition is processed by the partition adjunct utilizing virtual address space donated to the partition adjunct from the logical partition. The partition adjunct and the logical partition share a common virtual address to real address page table, and context switching the current state machine from the logical partition to the partition adjunct occurs without invalidating or modifying state data of selected memory management and address translation hardware of the data processing system. In a hardware multithreaded system, the partition adjunct is dispatched on a single thread, while another thread continues to run in the logical partition initiating the service request. | 02-05-2009 |
| 20090037907 | CLIENT PARTITION SCHEDULING AND PRIORITIZATION OF SERVICE PARTITION WORK - A method in a data processing system is provided for processing a service request of a client partition. The method includes: obtaining by a service partition of the data processing system the service request from the client partition, wherein both the client and service partitions execute above a hypervisor of the data processing system; and processing the service request by the service partition utilizing a processor quantum assigned to the client partition and donated by the client partition to the service partition. The client partition controls scheduling of the service partition by queuing the service request at the client partition until the client partition decides to proceed with execution of the service request by the service partition. In one implementation, the service partition is a partition adjunct of the data processing system, which utilizes donated virtual address space of the client partition. | 02-05-2009 |
| 20090037908 | PARTITION ADJUNCT WITH NON-NATIVE DEVICE DRIVER FOR FACILITATING ACCESS TO A PHYSICAL INPUT/OUTPUT DEVICE - Dedicated access is provided to a physical input/output (I/O) device which is non-configurable by an initiating logical partition. Access is established by: initiating, by the logical partition, creation of a partition adjunct; invoking a hypervisor of the data processing system to instantiate the partition adjunct with resources donated from the initiating logical partition, the donated resources including a donated virtual address space of the logical partition and the physical I/O device; creating, by the hypervisor, the partition adjunct and assigning the donated virtual address space and donated physical I/O device to the created partition adjunct; and interfacing, by the hypervisor, the logical partition and the created partition adjunct, the interfacing including providing the logical partition with a virtual I/O device which replaces the donated physical I/O device, and which is configurable by the logical partition. | 02-05-2009 |
| 20090037941 | MULTIPLE PARTITION ADJUNCT INSTANCES INTERFACING MULTIPLE LOGICAL PARTITIONS TO A SELF-VIRTUALIZING INPUT/OUTPUT DEVICE - Multiple logical partitions are provided access to a self-virtualizing input/output device of a data processing system via multiple dedicated partition adjunct instances. Access is established by: interfacing each logical partition to one or more associated partition adjunct instances, each partition adjunct instance coupling its associated logical partition to one of a virtual function or a queue pair of the self-virtualizing input/output device, and each partition adjunct instance being a separate dispatchable state and being created employing virtual address space donated from the respective logical partition or a hypervisor of the data processing system, and each partition adjunct instance including a device driver for the virtual function or queue pair of the self-virtualizing input/output device; and providing each logical partition with at least one virtual input/output which is interfaced through the logical partition's respective partition adjunct instance(s) to a virtual function or queue pair of the self-virtualizing input/output device. | 02-05-2009 |
| 20090083575 | Replacing A Failing Physical Processor - Replacing a failing physical processor in a computer supporting multiple logical partitions, where the logical partitions include dedicated partitions and shared processor partitions, the dedicated partitions are supported by virtual processors having assigned physical processors, and the shared processor partitions are supported by pools of virtual processors. The pools of virtual processors have assigned physical processors. Embodiments operate generally by assigning priorities to the dedicated partitions and to the pools of virtual processors; detecting a checkstop of a failing physical processor; retrieving the failing physical processor's state; replacing by a hypervisor the failing physical processor with a replacement physical processor assigned to a dedicated partition or pool, which dedicated partition or pool has the lowest priority among the priorities of the dedicated partitions and pools; and assigning the retrieved state of the failing physical processor as the state of the replacement physical processor. | 03-26-2009 |
| 20090106586 | Assigning A Processor To A Logical Partition - Assigning a processor to a logical partition in a computer supporting multiple logical partitions that include assigning priorities to partitions, detecting a checkstop of a failing processor of a partition, retrieving the failing processor's state, replacing by a hypervisor the failing processor with a replacement processor from a partition having a priority lower than the priority of the partition of the failing processor, and assigning the retrieved state of the failing processor as the state of the replacement processor. | 04-23-2009 |
| 20110243134 | Data Frame Forwarding Using a Distributed Virtual Bridge - Systems and methods to forward data frames are provided. A particular method may include receiving a data frame at a distributed virtual bridge. The distributed virtual bridge includes a first bridge element coupled to a first server computer and a second bridge element coupled to the first bridge element and to a second server computer. The distributed virtual bridge further includes a controlling bridge coupled to the first bridge element and to the second bridge element. The controlling bridge includes a global forwarding table. The data frame is forwarded from the first bridge element to the second bridge element of the distributed virtual bridge using address data associated with the data frame. A logical network associated with the frame may additionally be used to forward the data frame. | 10-06-2011 |
| 20110243146 | Data Frame Forwarding Using a Multitiered Distributed Virtual Bridge Hierarchy - Systems and methods to forward data frames are provided. A particular method may include evaluating address data of a first data frame at a first virtual bridge coupled to a first virtual machine of a first server computer of a plurality of server computers. Based upon the evaluation at the first virtual bridge, the first data frame may be forwarded to a second virtual bridge associated with an adapter that is coupled to the first virtual machine. The address data of the first data frame may be evaluated at the second virtual bridge. Based upon the evaluation, the data frame may be forwarded to a third virtual bridge configured to forward the data frame based upon the address data to a second server computer of the plurality of server computers. | 10-06-2011 |
| 20110252167 | PHYSICAL TO HIERARCHICAL BUS TRANSLATION - In an embodiment, a translation of a physical bus number to a hierarchical bus number is written to a south chip. The south chip receives a configuration write command that comprises a physical bus number. The south chip sends the configuration write command to a device via the bus identified by the physical bus number, and the device stores the physical bus number in the device. In response to a received message from a device that comprises the physical bus number, the south chip replaces the physical bus number in the message with the hierarchical bus number. The south chip sends the message to a north chip via a point-to-point serial link. Both the physical bus number and the hierarchical bus number identify a bus with which the device connects to a bridge in the south chip. | 10-13-2011 |
| 20110252170 | HIERARCHICAL TO PHYSICAL BUS TRANSLATION - In an embodiment, a translation of a hierarchical bus number to a physical bus number and a bridge identifier of a bridge are written to a north chip. A request is received that comprises an identifier of a destination. A determination is made that the identifier comprises the hierarchical bus number. In response to the determination, the identifier of the destination is replaced in the request with the physical bus number and the bridge identifier. The request is sent to the bridge identified by the bridge identifier. A south chip comprises the bridge, and the south chip is connected to the north chip via a point-to-point serial link. The physical bus number identifies a bus that connects the bridge to a device. The request comprises a configuration write request that requests a write of data to the device. | 10-13-2011 |
| 20110252173 | TRANSLATING A REQUESTER IDENTIFIER TO A CHIP IDENTIFIER - In an embodiment a translation of RID (requester identifier) ranges to identifiers of north chips is stored into a south chip. A command that comprises a command RID is received at the south chip from a device. In response, a RID range is determined that encompasses the command RID, and a north chip identifier is found that is assigned a virtual function identified by the command RID. The command is sent from the south chip to the north chip identified by the north chip identifier. The translation comprises a RID compare value and a RID mask. A determination is made that the RID range encompasses the command RID by performing a logical-and operation on the command RID and the RID mask and comparing a result of the logical-and operation to the RID compare value. | 10-13-2011 |
| 20110252174 | HIERARCHICAL TO PHYSICAL MEMORY MAPPED INPUT/OUTPUT TRANSLATION - In an embodiment, a translation of a hierarchical MMIO address range to a physical MMIO address range and an identifier of a bridge in a south chip are written to a north chip. A transaction is received that comprises a hierarchical MMIO address. The hierarchical MMIO address that is within the hierarchical MMIO address range is replaced in the transaction with the identifier of the bridge and with a physical MMIO address that is within the physical MMIO address range in the south chip. The transaction is sent to the device that is connected to the bridge in the south chip. The physical MMIO address range specifies a range of physical MMIO addresses in memory in the device. | 10-13-2011 |
| 20110258340 | Distributed Virtual Bridge Management - Systems and methods to forward data frames are described. A particular method may include receiving a data frame at a switch of a plurality of networked switches coupled to a plurality of server computers. The data frame may be forwarded from a controlling bridge coupled to the plurality of networked switches. The data frame may be determined to include management data, and an operating parameter of the switch may be modified. | 10-20-2011 |
| 20110258641 | Remote Adapter Configuration - Systems and methods to remotely configure adapters are described. A particular method may include generating a management frame at a controlling bridge. The management frame may include instructions to configure an operating parameter of the adapter. The management frame may be communicated to a bridge element of a plurality of interconnected bridge elements in communication with the controlling bridge. The bridge element may be coupled to the adapter, and the operating parameter of the adapter may be configured. | 10-20-2011 |
| 20110261687 | Priority Based Flow Control Within a Virtual Distributed Bridge Environment - Systems and methods to communicate data frames are provided. A particular apparatus may include a first adapter having a first queue configured to store a data frame associated with a first priority. The adapter is configured to generate a first priority pause frame. A distributed virtual bridge may be coupled to the first adapter. The distributed virtual bridge may include an integrated switch router and a first transport layer module configured to provide a frame-based interface to the integrated switch router. The transport layer module may include a first buffer associated with the first priority. A first bridge element of the distributed virtual bridge may be coupled to the first adapter queue and to the first transport layer module. The first bridge element is configured to receive the first priority pause frame from the adapter and to communicate an interrupt signal to the first transport layer module to interrupt delivery of the data frame to the first queue. | 10-27-2011 |
| 20110261815 | Multicasting Using a Multitiered Distributed Virtual Bridge Hierarchy - Systems and methods to multicast data frames are provided. A particular apparatus includes a plurality of computing nodes and a distributed virtual bridge. The distributed virtual bridge includes a plurality of bridge elements coupled to the plurality of computing nodes. The plurality of bridge elements are configured to forward a copy of a multicast data frame to the plurality of computing nodes using group member information associated with addresses of the plurality of server computers. A controlling bridge coupled to the plurality of bridge elements is configured to communicate the group member information to the plurality of bridge elements. | 10-27-2011 |
| 20110261826 | Forwarding Data Frames With a Distributed Fiber Channel Forwarder - Systems and methods to forward data frames are described. A particular method may include associating a fiber channel forwarder with a bridge element. The fiber channel forwarder may be one of a plurality of fiber channel forwarders coupled to the bridge element. A data frame received at the bridge element may be forwarded to the fiber channel forwarder. | 10-27-2011 |
| 20110261827 | Distributed Link Aggregation - Systems and methods to forward data frames are described. A particular method may include generating a plurality of management frames at a controlling bridge. The management frames may include routing information. The plurality of management frames may be communicated to a plurality of bridge elements coupled to a plurality of server computers. The plurality of bridge elements are each configured to selectively forward a plurality of data frames according to the routing information. | 10-27-2011 |
| 20110262134 | Hardware Accelerated Data Frame Forwarding - Systems and methods to forward data frames are described. A particular method may include evaluating header data of a data frame at a bridge element, where the header data includes address data that corresponds to a Fiber Channel Forwarder in communication with the bridge element. Based upon the evaluation, the header data of the data frame may be modified at the bridge element in such a manner that the data frame is not routed through the Fiber Channel Forwarder. | 10-27-2011 |
| 20110264610 | Address Data Learning and Registration Within a Distributed Virtual Bridge - Systems and methods to forward data frames are provided. A particular apparatus may include a plurality of server computers and a distributed virtual bridge. The distributed virtual bridge may include a plurality of bridge elements coupled to the plurality of server computers and configured to forward a data frame between the plurality of server computers. The plurality of bridge elements may further be configured to automatically learn address data associated with the data frame. A controlling bridge may be coupled to the plurality of bridge elements. The controlling bridge may include a global forwarding table that is automatically updated to include the address data and is accessible to the plurality of bridge elements. | 10-27-2011 |
| 20110320671 | MOVING OWNERSHIP OF A DEVICE BETWEEN COMPUTE ELEMENTS - In an embodiment, a command is received that requests movement of ownership of a target device from an origin compute element to a destination compute element. From the origin compute element, a translation of a virtual bridge identifier to a first secondary bus identifier, a first subordinate bus identifier, and a first MMIO bus address range is removed. To the destination compute element, a translation of the target virtual bridge identifier to a second secondary bus identifier, a second subordinate bus identifier, and a second MMIO bus address range is added. From a south chip that comprises the target virtual bridge, a translation of the target virtual bridge identifier to an identifier of the origin compute element is removed. To the south chip, a translation of the target virtual bridge identifier to an identifier of the destination compute element is added. | 12-29-2011 |
