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Ariyama, JP
Masato Ariyama, Kawasaki JP
| Patent application number | Description | Published |
|---|---|---|
| 20120079445 | CIRCUIT BOARD DESIGNING DEVICE AND NON-TRANSITORY COMPUTER-READABLE MEDIUM - A circuit board designing device has a database that stores an another-component arrangement forbidden range table, a related component information table, and a relative-arranging position table, and a processing unit that executes arrangement of the components, determines the another-component arrangement forbidden range which is set to forbid arrangement of another component in the predetermined range on the basis of the arranging position of the basic component with reference to the another-component arrangement forbidden range table when arrangement of the basic component is instructed, acquires related component information corresponding to the related component to be combined with the basic components with reference to the related component information table, acquires a relative-arranging position of the related component from the relative-arranging position table on the basis of the acquired related component information, and sets the acquired related component in the another-component arrangement forbidden range when a predetermined condition is satisfied. | 03-29-2012 |
Minoru Ariyama, Chiba-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20090058542 | Variable frequency oscillating circuit - Provided is a variable frequency oscillating circuit which has a small circuit size and is unlikely to cause a semiconductor device to malfunction. One oscillating circuit ( | 03-05-2009 |
| 20090079411 | VOLTAGE DIVIDING CIRCUIT AND MAGNETIC SENSOR CIRCUIT - To provide a variable voltage dividing circuit capable of changing voltage values of a detection point and a release point along with a change in power supply voltage without changing a hysteresis width. The variable voltage dividing circuit according to the present invention includes: a voltage dividing unit which includes a resistor string formed of a plurality of resistors connected in series, and outputs divided voltages divided at connection points of the plurality of resistors, one end of the resistor string being applied with a first voltage, another end thereof being applied with a second voltage; a first constant current source connected to a first connection point of the resistor string; and a second constant current source connected to a second connection point located symmetrically to the first connection point with respect to a center of the resistor string in the resistor string, in which, in accordance with a voltage difference between the first voltage and the second voltage, any one of the first constant current source and the second constant current source subtracts a first adjustment current from a current flowing through the resistor string, and another thereof feeds a second adjustment current to the resistor string. | 03-26-2009 |
| 20100117637 | SENSOR CIRCUIT - Provided is a sensor circuit that is small in circuit scale, but is capable of temperature compensation. A reference voltage circuit (BL | 05-13-2010 |
| 20100117715 | SENSOR CIRCUIT - Provided is a sensor circuit that is small in circuit scale, but is capable of temperature compensation. A reference voltage circuit (BL | 05-13-2010 |
| 20100308815 | MAGNETIC SENSOR DEVICE - Provided is a magnetic sensor device including: a switching circuit that controls switching of a terminal pair of the magnetoelectric conversion element to which a supply voltage is applied and a terminal pair to which detection voltage of a magnetic intensity is output; a differential amplifier that differentially amplifies the detection voltage; a first capacitor connected to a first output terminal of the differential amplifier; a second switch connected to a second output terminal of the differential amplifier; a comparator that has a first input terminal connected to the first capacitor and a second input terminal connected to the second switch; a first switch connected between the first input terminal and an output terminal of the comparator; and a second capacitor connected to the second input terminal of the comparator; and a detection voltage setting circuit connected to the second capacitor, in which effects of respective offset voltages of the magnetoelectric conversion element, the amplifier, and the comparator are suppressed, and an arbitrary detection magnetic field intensity is set to enable accurate magnetic reading. | 12-09-2010 |
| 20110074404 | MAGNETIC SENSOR CIRCUIT - Provided is a magnetic sensor circuit of low power consumption, in which a magnetic detection level less depends on a resistance value of an internal resistor of a power source. A comparator circuit compares a voltage which is based on a magnetic field and generated after sampling under a state in which power is supplied to mainly a Hall element and an amplifier circuit to drop a power supply voltage, with a reference voltage after sampling under the same state. Both the voltages are generated based on the power supply voltage dropped by an internal resistor. Therefore, the magnetic detection level less depends on a resistance value of the internal resistor. The comparator circuit may be disabled during a sample period, and the Hall element and the amplifier circuit may be disabled during a comparison period, and hence power consumption of the magnetic sensor circuit is reduced by corresponding power. | 03-31-2011 |
| 20110127989 | CONSTANT CURRENT CIRCUIT - Provided is a constant current circuit capable of low current consumption operation, which is prevented from repeating a start-up state and a zero steady state and entering an oscillating state when power is activated. When power is activated, until a node (A) reaches a start-up state, an excitation current is continued to be supplied to a node (B), to thereby reliably start up the constant current circuit in a short period of time without repeating the start-up state and the zero steady state. | 06-02-2011 |
| 20110133812 | PHYSICAL QUANTITY SENSOR - Provided is a physical quantity sensor capable of improving physical quantity detection precision thereof. The physical quantity sensor includes a bridge resistance type physical quantity detection element for generating a voltage based on a bias current and a physical quantity, a current supply circuit for supplying the bias current to the physical quantity detection element, and a leakage current control circuit for causing leakage currents flowing when switches of the current supply circuit are in an off state to flow into a ground terminal. | 06-09-2011 |
| 20110241662 | MAGNETIC SENSOR DEVICE - Provided is a magnetic sensor device capable of suppressing a variation in determination for detection or canceling of a magnetic field intensity, which is caused by noise generated from respective constituent elements included in the magnetic sensor device and external noise, to thereby achieve high-precision magnetic reading. The magnetic sensor device includes: a first D-type flip-flop and a second D-type flip-flop each having an input terminal connected to an output terminal of a comparator; an XOR circuit having a first input terminal and a second input terminal which are connected to an output terminal of the first D-type flip-flop and an output terminal of the second D-type flip-flop, respectively; a selector circuit; and a third D-type flip-flop having an input terminal connected to an output terminal of the selector circuit. The selector circuit includes: a first input terminal (A) and a second input terminal (B) which are connected to the output terminal of the second D-type flip-flop and an output terminal of the third D-type flip-flop, respectively; and a select terminal connected to an output terminal of the XOR circuit. The selector circuit selectively outputs input signals from the first input terminal (A) and the second input terminal (B), according to an output of the XOR circuit. | 10-06-2011 |
Naoki Ariyama, Tokyo JP
| Patent application number | Description | Published |
|---|---|---|
| 20110206272 | SYSTEM POWER LEVELING DEVICE AND IMAGE DIAGNOSTIC SYSTEM - A system power leveling device includes a bidirectional converter connected to a system bus line providing a electric power to a load from a power source and having a first and a second switching element, a power storage device connected to the bidirectional converter, a first specifying section for specifying a power consumption of the load, a charge-discharge control section for controlling the charge and the discharge of the power storage device by controlling the bidirectional converter based on the power consumption specified at the first specifying section, and a second specifying section specifying a current or an electric power of the charge or the discharge. | 08-25-2011 |
Takeo Ariyama, Kanagawa JP
| Patent application number | Description | Published |
|---|---|---|
| 20110131476 | RECORDING APPARATUS AND RECORDING METHOD - A recording apparatus includes a first operation unit that calculates an EDC intermediate value from first data in a first region at least including data to be read after an EDC when reading data in a second sequence in a first sector from a data buffer that stores a block, a data memory that stores at least part of the first data used for operation by the first operation unit, a second operation unit that reads data excluding the first data from the block as second data from the data buffer and calculates the EDC based on the second data and the EDC intermediate value, and an integration unit that integrates the first data, the second data and the EDC, wherein the integration unit receives the EDC and the second data from the second operation unit, receives the first data from the data memory, and integrates and outputs them. | 06-02-2011 |
Takeo Ariyama, Kawasaki-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20090103411 | DECODE DEVICE, REPRODUCTION APPARATUS, AND METHOD FOR DECODING - A decoding apparatus includes a burst cutting area (BCA) signal interval measuring device which measures a signal interval of a BCA area and which outputs BCA signal interval information, a T converter which obtains T information from the BCA signal interval information, a sequencer which detects a space area based on a first threshold value and which outputs an output enable signal based on the T information and a detecting result, wherein the output enable signal shows that a signal is obtained from a data area of the BCA area, and the space area is a non-signal area of the BCA area, and a channel data converter which converts the T information into channel data based on the output enable signal from the sequencer. | 04-23-2009 |
Teruko Ariyama, Osaka JP
| Patent application number | Description | Published |
|---|---|---|
| 20090074861 | STABLE TABLET CONTAINING DROXIDOPA - A tablet containing droxidopa as an active ingredient in a proportion of 20-80 wt % relative to the total weight of the tablet, and characteristically containing at least one excipient selected from mannitol, lactose, erythritol, glucose, sucrose, crystalline cellulose, and corn-derived starch is provided. In addition, a preparation containing corn-derived processed starch or polyvinyl alcohol as a binder and the like, which is a stable tablet containing droxidopa as an active ingredient, is provided. | 03-19-2009 |
Teruko Ariyama, Osaka-Fu JP
| Patent application number | Description | Published |
|---|---|---|
| 20090286805 | Solubiliazation preparation - A solution-type preparation of lurasidone comprising N-[4-[4-(1,2-benzisothiazol-3-yl)-1-piperazinyl]-(2R,3R)-2,3-tetramethylene-butyl]-(1′R,2′S,3′R,4′S)-2,3-bicyclo[2,2,1]heptanedicarboxyimide hydrochloride (lurasidone) as an active ingredient and containing at least one substance selected from benzyl alcohol, N,N-dimethylacetamide, lactic acid and propylene glycol. | 11-19-2009 |
Toshikazu Ariyama, Nirasaki-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20080257537 | TEMPERATURE CONTROL METHOD, TEMPERATURE CONTROL APPARATUS AND HIGH/LOW TEMPERATURE PROCESSING SYSTEM - A temperature control apparatus that controls a temperature of a target object by a heat exchange between a temperature control liquid and the target object. The apparatus includes a pressurizing unit that pressurizes the temperature control liquid to increase a boiling point thereof; a heating unit that increases a temperature of the temperature control liquid to become higher than or equal to a boiling point of the temperature control liquid observed at a normal pressure; and a heat exchanging unit that exchanges heat between the target object and the temperature control liquid whose temperature has been increased to become higher than or equal to the boiling point of the temperature control liquid observed at the normal pressure. | 10-23-2008 |
Yoshihiro Ariyama, Tokyo JP
| Patent application number | Description | Published |
|---|---|---|
| 20090009818 | Communication device - A communication device transmits voice and facsimile signals in the same channel between a terminal device and a packet network. The communication device has an echo canceler and a jitter buffer. The jitter buffer has a delay recovery control function that selectively deletes data from the jitter buffer to recover from packet delays. After detecting a facsimile tone, the communication device waits to detect a certain interval of silence, then deactivates its echo canceler and delay recovery control function and switches into facsimile communication mode. If a certain interval of silence is detected during the facsimile transmission, the communication device reactivates its echo canceler and delay recovery control function and continues communicating in voice mode if the line is left connected. | 01-08-2009 |
Yuji Ariyama, Tokyo JP
| Patent application number | Description | Published |
|---|---|---|
| 20090174420 | TEST APPARATUS, PROBE CARD, AND TEST METHOD - There is provided a test apparatus for testing a device under test. The test apparatus includes a plurality of drivers that respectively output a plurality of test signals to a same terminal of the device under test so as to supply, to the same terminal of the device under test, a multiple-valued signal that is generated by combining together the plurality of test signals, and a plurality of probe pins that are provided in a one-to-one correspondence with the plurality of drivers. Here, each of the plurality of probe pins has a top end portion to be electrically connected to the same terminal of the device under test so as to supply a signal output from a corresponding one of the plurality of drivers to the same terminal of the device under test while the test apparatus is testing the device under test, and the top end portion of each probe pin is kept electrically open while the test apparatus is not testing the device under test. | 07-09-2009 |