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Aravind
Aravind Appaswamy, Atlanta, GA US
| Patent application number | Description | Published |
|---|---|---|
| 20090231034 | Inverse mode SiGe HBT cascode device and fabrication method - Disclosed is a device structure using an inverse-mode cascoded Silicon-Germanium (SiGe) Heterojunction Bipolar Transistor (HBT) beneficial in applications requiring radiation hardened circuitry. The device comprises a forward-mode common-emitter HBT cascoded with a common-base inverse-mode HBT, sharing a common sub-collector. An exemplary device was measured to have over 20 dB of current gain, and over 30 dB of power gain at 10 GHz, thus demonstrating the use of these circuits for high-frequency circuit applications. In addition, the radiation response and voltage limits were characterized and showed to have negligible performance effects in typical operating conditions. Due to the unique topology, the disclosed device has the benefit of being a more compact cascode design and the additional benefit of providing significantly improved radiation tolerance. | 09-17-2009 |
Aravind Arepally, Atlanta, GA US
| Patent application number | Description | Published |
|---|---|---|
| 20110130657 | Protection Device and Method Against Embolization Agent Reflux - An apparatus is provided that is useful in an embolization procedure and enables substantially unrestricted forward flow of blood in a vessel and reduces or stops reflux (regurgitation or backward flow) of embolization agents which are introduced into the blood. A method of using the apparatus is also provided. | 06-02-2011 |
| 20110137399 | Microvalve Protection Device and Method of Use for Protection Against Embolization Agent Reflux - An apparatus is provided that is useful in an embolization procedure and enables substantially unrestricted forward flow of blood in a vessel and reduces or stops reflux (regurgitation or backward flow) of embolization agents which are introduced into the blood. A method of using the apparatus is also provided. | 06-09-2011 |
Aravind Arepally, Baltimore, MD US
| Patent application number | Description | Published |
|---|---|---|
| 20090216109 | MRI Compatible Vascular Occlusive Devices and Related Methods of Treatment and Methods of Monitoring Implanted Devices - Implantable aneurysm-sac treatment devices include an implantable coil body configured and sized to reside in a sac of an aneurysm. The body has an inductance and capacitance. The capacitance is selected so that the coil resonates at a Larmor frequency of a predefined magnetic field strength. | 08-27-2009 |
| 20100047355 | MAGNETIC RESONANCE-DETECTABLE, ULTRASOUND-DETECTABLE AND/OR RADIOPAQUE MICROCAPSULES AND USES THEREOF - The present invention provides a microcapsule for implantation into a mammalian body, comprising: a) at least one cell and/or bioactive agent; and b) a biocompatible semi-permeable membrane encapsulating the at least one cell, wherein the biocompatible semi-permeable membrane comprises: at least one polycationic polymer region, at least one alginate polymer region, and a paramagnetic or superparamagnetic metal that does not participate in the crosslinking of the alginate polymer. The present invention further provides methods of making the microcapsules of this invention and use of the microcapsules of this invention in methods of delivering cells and/or therapeutic agents to a subject and in methods of embolization. | 02-25-2010 |
| 20100106171 | TRANSCAVAL MESENTERIC VENOUS ANASTOMOSIS AND ACCESS SYSTEM - Disclosed is a system for creating an anastomosis between the inferior vena cava (IVC) and the mesenteric portal vein. The system includes an anastomosis device and a catheter. The anastomosis device brings the IVC and the portal vein into apposition. The resulting anastomosis enables treatment for portal hypertension as well as provides repeated and easy access to the portal system for direct delivery of therapeutic agents to portal organs. The anastomosis device has a proximal flange part, a distal flange part, a flow lumen between them. The proximal and distal flange parts include a plurality of radial struts. A valve part is disposed on one or both of the proximal and distal flange parts. The anastomosis device is made of a memory shape material. The catheter contains a collapsed anastomosis device for insertion and has one or more RF antennas to make the catheter visible under MRI guidance. | 04-29-2010 |
| 20110020239 | METHODS FOR IN VIVO IMAGING OF CELLS - The instant invention provides methods for the in vivo imaging of cells using one or more imaging modalities. | 01-27-2011 |
Aravind Chamarti, Painted Post, NY US
| Patent application number | Description | Published |
|---|---|---|
| 20090045961 | Antenna systems for passive RFID tags - Antenna systems for passive radio-frequency identification (RFID) tags. The antenna systems have a very small form factor with good power harvesting and good performance in proximity to other antennas. The antenna system includes at least one, and preferably two, parallel serpentine antenna elements formed on, or otherwise supported by, an antenna substrate so that a RFID-tag integrated circuit (IC) can be electrically contacted to the antenna system at one end of the antenna substrate. A conducting wire that runs in the same direction as the at least one serpentine antenna element is used to match impedance and enhance antenna performance and power flow between the antenna and the IC. An impedance-matching circuit may be employed in place of the conducting wire to facilitate impedance matching between the antenna and the IC. | 02-19-2009 |
| 20090195363 | RFID SYSTEMS AND METHODS FOR AUTOMATICALLY DETECTING AND/OR DIRECTING THE PHYSICAL CONFIGURATION OF A COMPLEX SYSTEM - A radio-frequency identification (RFID)-based configuration detection system for automatically detecting, directing, and/or configuring the physical configuration of a complex system constituted by a set of one or more types of mateable components. The RFID configuration detection system utilizes a set of mateable RFID tags arranged so that each mateable component includes at least one mateable RFID tag. Each RFID tag includes information about its associated component and is arranged so that when the components are mated, their associated RFID tags also are mated. The system uses at least one RFID reader to read RFID tag signals from the RFID tags. The RFID tag signals provide information about mating status of the component, as well as information about components themselves. An information processing system operably connected to the RFID reader receives and process information concerning the number and type of mated connections and thus the configuration. Changes to the configuration, such as mated connections being unmated, can be tracked to provide real-time configuration information. | 08-06-2009 |
| 20100245057 | COMPONENTS, SYSTEMS, AND METHODS FOR ASSOCIATING SENSOR DATA WITH COMPONENT LOCATION - Components having one or more sensors adapted to provide sensor data relating to a condition(s) of the component are disclosed. The component is adapted to communicate with another mating component to associate sensor data with identity information of the mating component. The sensor and identity information can be communicated remotely including via radio-frequency communications employing RF identification devices (RFIDs). Location of the mating component can be determined using the identity information of the mating component. In this manner, the sensor data can be associated with the location of the mating component using the identity information in a “component-to-component” configuration to provide location-specific sensor data. Having the ability to localize sensor data to a specific location can assist in pinpointing areas where performance or other condition issues may exist in a component, a mating component, an article of manufacture associated with the components, and/or communication and/or transmissions lines coupled between components. | 09-30-2010 |
| 20110175503 | EQUIPMENT CABINET HAVING IMPROVED SPACE UTILIZATION - An equipment cabinet ( | 07-21-2011 |
Aravind Dasu, Providence, UT US
| Patent application number | Description | Published |
|---|---|---|
| 20090319253 | FPGA Simulated Annealing Accelerator - Iterative repair problems are generally solved using a combinatorial search method such as simulated annealing are addressed with a FPGA-based coarse-grain pipelined architecture to accelerate a simulated annealing based iterative repair-type event scheduling application. Over 99% of the work done by any simulated annealing algorithm is the repeated execution of three high-level steps: (1) generating, (2) evaluating, and (3) determining the acceptability of a new problem solution. A pipelined processor is designed to take advantage of these steps. | 12-24-2009 |
| 20110082994 | ACCELERATED RELOCATION CIRCUIT - A Partial bitstream relocation method to generates source and destination addresses on Field Programmable Gate Arrays. The bitstream from an active source is located and read in a nonintrusive manner, and written to a destination address. The accelerator runs in real time, moving source code on the fly. Code may be altered by mirror inversion for proper placement when necessary. | 04-07-2011 |
Aravind Dharmastala, Chennai IN
| Patent application number | Description | Published |
|---|---|---|
| 20110252024 | SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR IDENTIFYING OBJECTS AS AT LEAST POTENTIALLY UNWANTED BASED ON STRINGS OF SYMBOLS - A system, method, and computer program product are provided for identifying objects as being at least potentially unwanted based on strings of symbols identified therein. In use, strings of symbols are identified in a plurality of sequential lines of an object. Further, the object is conditionally identified as being at least potentially unwanted, based on the strings of symbols. | 10-13-2011 |
Aravind Kalaiah, Los Gatos, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20110078427 | TRAP HANDLER ARCHITECTURE FOR A PARALLEL PROCESSING UNIT - A trap handler architecture is incorporated into a parallel processing subsystem such as a GPU. The trap handler architecture minimizes design complexity and verification efforts for concurrently executing threads by imposing a property that all thread groups associated with a streaming multi-processor are either all executing within their respective code segments or are all executing within the trap handler code segment. | 03-31-2011 |
Aravind Kamarajugadda, San Diego, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20110228750 | Extended Local IP Access For A Converged Gateway In A Hybrid Network - The implementation of Local IP Access (LIPA), “Extended” LIPA (ELIPA), and Selected IP Traffic Offload (SIPTO) for the design of a “Converged Gateway” (CGW) are disclosed. The gateway system may provide various features such as femtocell access to local networks, public Internet, and private service provider networks. | 09-22-2011 |
Aravind Kerudi, Bardez IN
| Patent application number | Description | Published |
|---|---|---|
| 20100316713 | PHARMACEUTICAL COMPOSITION - The application relates to solid pharmaceutical compositions suitable for oral administration comprising an indolylmaleimide derivative, process for their production and use of the pharmaceutical compositions. | 12-16-2010 |
Aravind Killampalli, Hillsboro, OR US
| Patent application number | Description | Published |
|---|---|---|
| 20090323759 | Temperature measurement with reduced extraneous infrared in a processing chamber - Temperature measurement using a pyrometer in a processing chamber is described. The extraneous light received by the pyrometer is reduced. In one example, a photodetector is used to measure the intensity of light within the processing chamber at a defined wavelength. A temperature circuit is used to convert the measured light intensity to a temperature signal, and a doped optical window between a heat source and a workpiece inside processing chamber is used to absorb light at the defined wavelength directed at the workpiece from the heat source. | 12-31-2009 |
| 20090325392 | SUB-SECOND ANNEALING PROCESSES FOR SEMICONDUCTOR DEVICES - An annealing method and apparatus for semiconductor manufacturing is described. The method and apparatus allows an anneal that can span a thermal budget and be tailored to a specific process and its corresponding activation energy. In some cases, the annealing method spans a timeframe from about 1 millisecond to about 1 second. An example for this annealing method includes a sub-second anneal method where a reduction in the formation of nickel pipes is achieved during salicide processing. In some cases, the method and apparatus combine the rapid heating rate of a sub-second anneal with a thermally conductive substrate to provide quick cooling for a silicon wafer. Thus, the thermal budget of the sub-second anneal methods may span the range from conventional RTP anneals to flash annealing processes (including duration of the anneal, as well as peak temperature). Other embodiments are described. | 12-31-2009 |
Aravind Mangudi, Gilbert, AZ US
| Patent application number | Description | Published |
|---|---|---|
| 20090251213 | METHOD FOR ADJUSTING THRESHOLD VOLTAGE AND CIRCUIT THEREFOR - A method and circuit for changing a threshold voltage of a transistor. The circuit includes a sense circuit coupled to a switching transistor, a circuit transistor and to one terminal of a resistor. The other terminal of the resistor is connected to a body contact. The switching transistor directs current along one of two different paths in response to an input voltage sensed by the sense circuit. When the switching transistor directs a first current along one path, the first current is steered towards the resistor and flows through the resistor in one direction and when the switching transistor directs a second current along the other path, the second current is directed towards the resistor and flows through the resistor in the opposite direction from the first current. Steering the currents varies the potential of a body with respect to the potential at the source of the circuit transistor. | 10-08-2009 |
| 20100176883 | METHOD FOR ADJUSTING THRESHOLD VOLTAGE AND CIRCUIT THEREFOR - A method and circuit for changing a threshold voltage of a transistor. The circuit includes a sense circuit coupled to a switching transistor, a circuit transistor and to one terminal of a resistor. The other terminal of the resistor is connected to a body contact. The switching transistor directs current along one of two different paths in response to an input voltage sensed by the sense circuit. When the switching transistor directs a first current along one path, the first current is steered towards the resistor and flows through the resistor in one direction and when the switching transistor directs a second current along the other path, the second current is directed towards the resistor and flows through the resistor in the opposite direction from the first current. Steering the currents varies the potential of a body with respect to the potential at the source of the circuit transistor. | 07-15-2010 |
Aravind Mohanram, Shrewsbury, MA US
| Patent application number | Description | Published |
|---|---|---|
| 20090186250 | Bilayer interconnects for solid oxide fuel cells - A solid oxide fuel cell (SOFC) includes a plurality of sub-cells. Each sub-cell includes a first electrode in fluid communication with a source of oxygen gas, a second electrode in fluid communication with a source of a fuel gas, and a solid electrolyte between the first electrode and the second electrode. The SOFC further includes an interconnect between the sub-cells. The interconnect includes a first layer in contact with the first electrode of each sub-cell, and a second layer in contact with the second electrode of each sub-cell. The first layer includes at least one material selected from the group consisting of a doped M-ferrite based perovskite, a doped M′-ferrite based perovskite, a doped MM′-ferrite based perovskite and a doped M′-chromite based perovskite, wherein M is an alkaline earth metal and M′ is a rare earth metal. The second layer includes a doped M″-titanate based perovskite, wherein M″ is an alkaline earth metal. A solid oxide fuel cell having a plurality of cells as described above is formed by connecting each of a plurality of sub-cells with an interconnect as described above. | 07-23-2009 |
| 20100167170 | Co-doped YSZ electrolytes for solid oxide fuel cell stacks - A solid oxide fuel cell electrolyte is fabricated by combining an yttria-stabilized zirconia powder with α-Al | 07-01-2010 |
| 20100183947 | Highly Sinterable Lanthanum Strontium Titanate Interconnects Through Doping - An interconnect material is formed by combining a lanthanum-doped strontium titanate with an aliovalent transition metal to form a precursor composition and sintering the precursor composition to form the interconnect material. The aliovalent transition metal can be an electron-acceptor dopant, such as manganese, cobalt, nickel or iron, or the aliovalent transition metal can be an electron-donor dopant, such as niobium or tungsten. A solid oxide fuel cell, or a strontium titanate varistor, or a strontium titanate capacitor can include the interconnect material that includes a lanthanum-doped strontium titanate that is further doped with an aliovalent transition metal. | 07-22-2010 |
Aravind Musuluri, Birmingham, AL US
| Patent application number | Description | Published |
|---|---|---|
| 20110082868 | SYSTEM AND METHOD FOR BLOCK SEGMENTING, IDENTIFYING AND INDEXING VISUAL ELEMENTS, AND SEARCHING DOCUMENTS - A method for segmenting, identifying and indexing visual elements, and searching documents comprises for each document generating metadata, segmenting the document into blocks using the metadata, performing block operations on the identified blocks, identifying and indexing inline visual elements using data and metadata rules, identifying and indexing block visual elements using profiles, and searching for documents containing visual elements. | 04-07-2011 |
Aravind Nallan, San Jose, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20110099585 | METHODS AND APPARATUS FOR IMPLEMENTING DYNAMIC PROGRAM GUIDES ON MOBILE DEVICES - Mechanisms are provided for allowing a mobile device to dynamically obtain program guide data. A mobile device having the capability of playing media streams is configurable to dynamically request program guide structure information followed by program guide content information. In one example, the program guide structure information allows a user to begin navigating the program guide data in an active and dynamic manner. Program guide content information including data such as program titles, times, icons, and links are then downloaded and displayed as needed. Potentially limitless amounts of program guide data can be provided on a mobile device. Program guide content information can be provided in a generic manner while allowing user layout customization. Program guide information can also be preemptively provided to a mobile device based on a variety of criteria. | 04-28-2011 |
Aravind Perumandla, Irving, TX US
| Patent application number | Description | Published |
|---|---|---|
| 20090172751 | METHOD AND APPARATUS FOR PROVIDING VIRTUAL CHANNELS - An approach is provided for presenting, via a set-top box, audio and/or video transmission to a user. An input is received from the user specifying media content that is accessible over a data network. The media content is retrieved over the data network, and presented via the set-top box. | 07-02-2009 |
Aravind Ramarathinam, Redmond, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20090222553 | Monitoring network performance to identify sources of network performance degradation - A method of measuring, for communication paths between a networked computer and at least one other networked computer connected via a network performance, network information to detect network performance degradation and diagnose source(s) of the performance degradation. The diagnosis may be performed by a progressive elimination of possible sources. Network performance degradation may be attributed to problems at a local network or the Internet. The problem sources on the Internet may comprise, for example, an internet server provider (ISP) or a single remote server in communication with the networked computer. A network performance baseline established and maintained for each path may be employed in diagnosing the network performance degradation. | 09-03-2009 |
| 20090222555 | Network performance monitor - A network performance monitor for a computer. The performance monitor maintains a baseline for communication paths between a networked computer and other networked computers connected. The network performance baseline is established and maintained by measuring and updating network performance parameters of the communication paths. The network performance parameters are updated using values obtained during time intervals when the communication path consumed a bandwidth approximately equal to its estimated bandwidth. If congestion is detected on the network or the network is underutilized, values of the network performance parameters obtained during that interval are not used to update the network performance parameters. Some performance parameters in the baseline, such as minimum and maximum bandwidth values may be updated by computing a moving average of each parameter. Asymmetric weight values for updating the moving average may be selected based on a direction of change of a value of a network parameter. | 09-03-2009 |